Re: How to disable XMP on memory?

On Sat, 1/17/2026 10:56 AM, Mr. Man-wai Chang wrote:
> On 24/12/2025 1:24 am, Paul wrote:
>>
>> They're the same as the ones I've got.
>>
>> 2133 as slowest JEDEC.
>> 3200 as XMP rate       DDR4-3200 (1600MHz)
> 
> Late reply:
> 
> I checked my DDR4-3200 moduels. Their JEDEC (#8) is rated 2400, as reported by CPU-Z, if I didn't misunderstand what you called "slowest JEDEC".
> 
> Following is the relevant section from CPU-Z:
> 
> DIMM #                1
>     SMBus address        0x50
>     Memory type        DDR4
>     Module format        UDIMM
>     .....
>     Size            8192 MBytes
>     Max bandwidth        DDR4-3200 (1600 MHz)
>     Max JEDEC        DDR4-2400 (1200 MHz)
>     ....
>     Nominal Voltage        1.20 Volts
>     ....
> JEDEC timings table        CL-tRCD-tRP-tRAS-tRC @ frequency
>     JEDEC #1        9.0-9-9-22-31 @ 666 MHz
>     JEDEC #2        10.0-11-11-25-35 @ 766 MHz
>     JEDEC #3        11.0-12-12-27-38 @ 833 MHz
>     JEDEC #4        12.0-12-12-29-41 @ 900 MHz
>     JEDEC #5        13.0-13-13-31-44 @ 966 MHz
>     JEDEC #6        14.0-15-15-35-49 @ 1066 MHz
>     JEDEC #7        15.0-16-16-37-52 @ 1133 MHz
>     JEDEC #8        16.0-16-16-39-55 @ 1200 MHz
>     JEDEC #9        18.0-16-16-39-55 @ 1200 MHz
>     JEDEC #10        20.0-16-16-39-55 @ 1200 MHz
> XMP profile            XMP-3200
>     Specification        DDR4-3200
>     VDD Voltage        1.350 Volts
>     .....
> 

Try the following mental experiment.

1) Turn off XMP.
2) Allow the BIOS to restart.
3) What was the selected clock rate ?

Answer: It's not 666MHz, that is for sure.
        In your table, "Auto" selecting JEDEC #6 is more likely.
        And the selection of that value, is a manifest constant in the BIOS code.
        Manifest values are determined for each generation of RAM.
        If I compared an Asus, a Gigabyte, an MSI, they should all use 1066/2133.
        Part of the reason for "agreement", is Award and Insyde and the rest, set this.

As an example, DDR3 had "two generations", a slow and a fast generation.
The preferred clock for each, is different.

You can compute the values you want, for any value of CAS.
The BIOS does this when calculating any intermediate result needed.
When the BIOS sets the timing parameters, it is the equations
the BIOS uses, that have the final say on any "interpolated" values.
For example, if the user selected "CAS19" which is not in the table,
the BIOS has no problem using the equations for this, to work out
all necessary values.

But in terms of what speed is set by JEDEC, that speed
is what the module starts at. 1066 ("2133") is an example
of a typical setting. That seems to be the JEDEC rating of the module,
the slow one that the BIOS uses at first startup with brand new
RAM. The equipment uses the conservative rating, to make sure the
BIOS starts. Any other value the user wants to select, the user
has the option of using Clear_CMOS if the setting selected
was too aggressive and the motherboard did not recover.

The BIOS does not select 666MHz because that would be silly.

The PLL on the RAM, seems to extend reasonably far in frequency.
It does not constrain the RAM particularly. When it comes to
Tsu and Th, there would be limits as to how many ticks
the chip supports for controlling setup and hold time.
The delay might be implemented with inverters for example.
And as the frequency drops, it takes more and more inverters
to support that. That is why any computed values do not drop
too low. Any aspect of operation that requires phase correction
(the calibration of the strobe done when the RAM is being
set up by the BIOS), could be using inverters as basic timing
elements. They can have delays of around 100ps or so.

The operation of DRAM, is not particularly affected by the
choice of clock frequency. But the essential functions must
still be supported. The RAM has to do Refresh cycles, and
the combination of Refresh and Read/Write cycles must be
"multiplexed" for the RAM to function. Your CPU may have to
wait an additional cycle, for the Refresh to finish.

Because the CAS delay is fixed, once a cycle starts, it is
expected to finish. While the RAM has some pretty fancy functions,
the CPU does not use all of them. And the state of the documentation,
makes it a bit harder to understand how it all works.

   Paul