Re: IBM - New SUB-Nanometer STACKED Chip
"Mr. Man-wai Chang" <[email protected]>
| Newsgroups | comp.os.linux.misc,alt.comp.hardware.pc-homebuilt,alt.magic.secrets,alt.conspiracy |
|---|---|
| Organization | https://sites.google.com/site/changmw/ |
| Message-ID | <[email protected]> |
On 6/29/2026 2:09 AM, Charlie Gibbs wrote: > On 2026-06-28, c186282 <[email protected]> wrote: >> >> IBM unveils sub-1-nanometer chip architecture that stacks 100 >> billion transistors onto a fingernail-sized processor >> >> . . . >> >> Pretty impressive ... and stacking two (three?) layers >> really packs a lot in. >> >> NOT sure how they deal with the HEAT in the stacked >> design. >> >> 100 billion ... how many in the i4004 ? > > Dunno - but I do remember that manufacturers hit a wall for > a while when trying to get below 1 micrometer. It took some > time before memory chips larger than 64K became available. Wall? Or Seal? :) -- @~@ Simplicity is Beauty! Remain silent! Drink, Blink, Stretch! / v \ May the Force and farces be with you! Live long and prosper!! /( _ )\ https://sites.google.com/site/changmw/ ^ ^ https://github.com/changmw/changmw The game is afoot... Meow...