Re: [PATCH 10/13] arm: dts: mt8188: add vdosys1-pipeline node

On 7/28/26 7:29 AM, Julien Stephan wrote:
> The vdosys1 syscon node from the upstream dtsi is bound by the clock
> driver in U-Boot, so the display routing (SEL_IN/SOUT muxes) of the
> same register block is described by a separate U-Boot specific node.
> It also carries the clocks of the HDR back-end path that are not
> attached to any component node.

In the U-Boot code (include/syscon.h), I see:

/*
 * Linux-compatible syscon-to-regmap
 * The syscon node can be bound to another driver, but still works
 * as a syscon provider.
 */
struct regmap *syscon_node_to_regmap(ofnode node)

So it seems like we should be able to make this work without adding
this extra device.

> 
> Signed-off-by: Julien Stephan <[email protected]>
> ---
>  arch/arm/dts/mt8188-u-boot.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm/dts/mt8188-u-boot.dtsi b/arch/arm/dts/mt8188-u-boot.dtsi
> index 131377d9a97..fd1121a72cd 100644
> --- a/arch/arm/dts/mt8188-u-boot.dtsi
> +++ b/arch/arm/dts/mt8188-u-boot.dtsi
> @@ -4,6 +4,18 @@
>   * Author: Julien Masson <[email protected]>
>   */
>  
> +/ {
> +	vdosys1_pipeline: vdosys1-pipeline {
> +		compatible = "mediatek,mt8188-vdosys1-pipeline";
> +		reg = <0 0x1c100000 0 0x1000>;
> +		clocks = <&vdosys1 CLK_VDO1_SMI_LARB3>,
> +			 <&vdosys1 CLK_VDO1_SMI_LARB2>,
> +			 <&vdosys1 CLK_VDO1_HDR_VDO_BE>,
> +			 <&vdosys1 CLK_VDO1_DPI0>,
> +			 <&vdosys1 CLK_VDO1_DPI1_HDMI>;
> +	};
> +};
> +
>  &u3phy0 {
>  	compatible = "mediatek,mt8188-tphy", "mediatek,generic-tphy-v3",
>  		     "mediatek,generic-tphy-v2";
>