[PATCH] arm: imx: initialize the system counter earlier on i.MX7

Emanuele Ghidoli <[email protected]>
Newsgroups gmane.comp.boot-loaders.u-boot
Message-ID <[email protected]>
From: Emanuele Ghidoli <[email protected]>

imx_gpcv2_init() calls udelay(), which through schedule() reaches
cyclic_run(). Since commit 9c1b13b3fd27 ("cyclic: reduce get_timer_us()
calls inside hlist_for_each_entry_safe()") get_timer_us() is called even
when no cyclic function is registered, so tick_to_time_us() divides by a
still zero CNTFRQ and __div0() hangs the board before the console is up.
The requested delay was a no-op as well, since us_to_tick() reads a CNTFRQ
of zero.

Initialize the system counter before imx_gpcv2_init(), and move the
"already initialized" guard from timer_get_boot_us() into timer_init() so
that the later timer_init() from the generic init sequence is a no-op.
Where the system counter timer_init() is not compiled in, the weak
definition is empty and the calling it is harmless.

Fixes: b059837850e4 ("imx: mx7: add gpc initialization for low power mode")
Fixes: 9c1b13b3fd27 ("cyclic: reduce get_timer_us() calls inside hlist_for_each_entry_safe()")
Signed-off-by: Emanuele Ghidoli <[email protected]>
---
 arch/arm/mach-imx/mx7/soc.c    | 6 ++++++
 arch/arm/mach-imx/syscounter.c | 6 ++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index e504c1fd52a0..8a858dea5187 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -331,6 +331,12 @@ int arch_cpu_init(void)
 
 	init_snvs();
 
+	/*
+	 * imx_gpcv2_init() needs to do a delay.
+	 * Timer must be initialized before calling a delay function.
+	 */
+	timer_init();
+
 	imx_gpcv2_init();
 
 	enable_ca7_smp();
diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c
index 96fe2c7c17bb..86311d0cc07d 100644
--- a/arch/arm/mach-imx/syscounter.c
+++ b/arch/arm/mach-imx/syscounter.c
@@ -65,6 +65,9 @@ int timer_init(void)
 	struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
 	unsigned long val, freq;
 
+	if (gd->arch.timer_rate_hz)
+		return 0;
+
 	freq = CFG_SC_TIMER_CLK;
 	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
 
@@ -103,8 +106,7 @@ ulong get_timer(ulong base)
 
 ulong timer_get_boot_us(void)
 {
-	if (!gd->arch.timer_rate_hz)
-		timer_init();
+	timer_init();
 
 	return tick_to_time(get_ticks());
 }
-- 
2.43.0
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