[PATCH v10 3/7] mtd: spi-nor-ids: Remove SPI_NOR_HAS_LOCK flag from GigaDevice GD25B256
Weijie Gao <[email protected]> Fri, 31 Jul 2026 16:09:17 +0800
| Newsgroups | gmane.comp.boot-loaders.u-boot |
|---|---|
| Message-ID | <192f510d4c6a1a645e1ad953f066ec5de49a3796.1785484578.git.weijie.gao@mediatek.com> |
The protection scheme that GD25B256 and all other chips supported is not
compatible with the spi-nor driver:
This driver supports BP{0,1,2} + TB,
while GD25B256 implements BP{0,1,2,3} + TB
Link: https://download.gigadevice.com/Datasheet/DS-00327-GD25B256D-Rev1.7.pdf
Fixes: e72023c4906 ("mtd: spi-nor-ids: add gigadevice part #")
Reviewed-by: Takahiro Kuwano <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
---
v5-v10: not changed
v4: new
---
drivers/mtd/spi/spi-nor-ids.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 2e4f63c0c7a..454969826b8 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -147,7 +147,7 @@ const struct flash_info spi_nor_ids[] = {
},
/* adding these 3V QSPI flash parts */
{INFO("gd25b256", 0xc84019, 0, 64 * 1024, 512, SECT_4K |
- SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES) },
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES)},
{INFO("gd25b512", 0xc8471A, 0, 64 * 1024, 1024, SECT_4K |
SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
{INFO("gd55b01g", 0xc8471B, 0, 64 * 1024, 2048, SECT_4K |
--
2.45.2