[QUESTION] Architecture and roadmap for Synopsys XPCS driver with APB3 indirect access

Hi everyone,

I am currently working on Ethernet driver integration for Synopsys IP in U-Boot, specifically focusing on the Synopsys XPCS (Physical Coding Sublayer) block.

After reviewing the current codebase, I noticed that while Linux has a dedicated XPCS subsystem driver (drivers/net/pcs/pcs-xpcs.c), U-Boot does not currently have a standalone equivalent.

Before starting development on a standalone driver, I would appreciate your guidance on a few architectural questions:

1. Existing References:
   Is there any existing/in-flight work or reference implementation in U-Boot or vendor trees for Synopsys XPCS handling?

2. APB3 Indirect Access vs. Clause 45 MDIO:
   Most typical implementations access the XPCS registers over MDIO Clause 45. In our hardware architecture, the XPCS is accessed via an indirect access mechanism using an APB3 management interface instead of MDIO. Are there any existing driver patterns or abstractions in U-Boot handling XPCS/PCS over non-MDIO register buses?

3. Design Context:
   Is the lack of a dedicated XPCS driver in U-Boot primarily due to design preference (e.g., relying on TF-A/BootROM pre-configuration, or embedding initialization into SoC glue code), or simply that a generic driver model port has not yet been submitted?

4. Upstream Integration & Guidelines:
   Is there interest in upstreaming a standalone Synopsys XPCS driver? If we implement this driver under U-Boot's Driver Model (DM), what key requirements or design points should we keep in mind to ensure it aligns with current networking uclass standards?

Any insights, historical context, or recommendations on how best to approach this within U-Boot would be greatly appreciated.

Thanks,
Akash Nair