[PATCH 22/30] rockchip: rk3399-roc-pc: Drop get_reset_cause() call

Jonas Karlman <[email protected]> Wed, 5 Aug 2026 17:44:53 +0000
Newsgroups gmane.comp.boot-loaders.u-boot
Message-ID <[email protected]>
The Firefly ROC-RK3399-PC board configures power LEDs depending on the
global reset state register value in xPL phase. get_reset_cause() is
used to determine the reset cause.

Reset cause handling is being moved into the sysreset_rockchip driver
get_status() ops, with plans to not include such ops in xPL builds.

Read the global reset state register directly to determine reset cause
to ease the migration of get_reset_cause() to use the get_status() ops.

Signed-off-by: Jonas Karlman <[email protected]>
---
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index 6937a27176f9..c7a2e9a80857 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -9,7 +9,7 @@
 #include <spl_gpio.h>
 #include <asm/io.h>
 
-#include <asm/arch-rockchip/cru.h>
+#include <asm/arch-rockchip/cru_rk3399.h>
 #include <asm/arch-rockchip/gpio.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 
@@ -18,6 +18,8 @@
 #define PMUGRF_BASE	0xff320000
 #define GPIO0_BASE	0xff720000
 
+#define GLB_POR_RST	0x0
+
 /**
  * LED setup for roc-rk3399-pc
  *
@@ -29,6 +31,7 @@
  */
 void led_setup(void)
 {
+	struct rockchip_cru * const cru = (void *)RK3399_CRU_BASE;
 	struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
 	struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
 	bool press_pwr_key = false;
@@ -40,7 +43,7 @@ void led_setup(void)
 			press_pwr_key = true;
 	}
 
-	if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) {
+	if (press_pwr_key && readl(&cru->glb_rst_st) == GLB_POR_RST) {
 		spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
 
 		spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5),
-- 
2.54.0