[PATCH 20/30] sysreset: rockchip: Remove use of rockchip_get_cru()

Complete the transition to use the CRU base address parameter instead of
getting it from the rockchip_get_cru() helper now that all clock drivers
have been converted to use the rockchip_sysreset_bind() helper.

Signed-off-by: Jonas Karlman <[email protected]>
---
 arch/arm/include/asm/arch-rockchip/clock.h |  5 -----
 drivers/sysreset/sysreset_rockchip.c       | 25 +++++++++++++---------
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 1b12867b489b..98fd8cd28ff3 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -140,11 +140,6 @@ static inline int rk_pll_id(enum rk_clk_id clk_id)
 	return clk_id - 1;
 }
 
-struct sysreset_reg {
-	unsigned int glb_srst_fst_value;
-	unsigned int glb_srst_snd_value;
-};
-
 /**
  * clk_get_divisor() - Calculate the required clock divisior
  *
diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
index 39cb16ec5456..27ba4ee0667c 100644
--- a/drivers/sysreset/sysreset_rockchip.c
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -10,22 +10,26 @@
 #include <sysreset.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/hardware.h>
-#include <linux/err.h>
 
-int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
+struct sysreset_reg {
+	unsigned long cru_base;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+};
+
+static int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
 {
-	struct sysreset_reg *offset = dev_get_priv(dev);
-	unsigned long cru_base = (unsigned long)rockchip_get_cru();
+	struct sysreset_reg *priv = dev_get_priv(dev);
 
-	if (IS_ERR_VALUE(cru_base))
-		return (int)cru_base;
+	if (!priv->cru_base)
+		return -EPROTONOSUPPORT;
 
 	switch (type) {
 	case SYSRESET_WARM:
-		writel(0xeca8, cru_base + offset->glb_srst_snd_value);
+		writel(0xeca8, priv->cru_base + priv->glb_srst_snd);
 		break;
 	case SYSRESET_COLD:
-		writel(0xfdb9, cru_base + offset->glb_srst_fst_value);
+		writel(0xfdb9, priv->cru_base + priv->glb_srst_fst);
 		break;
 	default:
 		return -EPROTONOSUPPORT;
@@ -63,8 +67,9 @@ int rockchip_sysreset_bind(struct udevice *pdev,
 	if (!priv)
 		return -ENOMEM;
 
-	priv->glb_srst_fst_value = glb_srst_fst;
-	priv->glb_srst_snd_value = glb_srst_snd;
+	priv->cru_base = cru_base;
+	priv->glb_srst_fst = glb_srst_fst;
+	priv->glb_srst_snd = glb_srst_snd;
 	dev_set_priv(sysreset_dev, priv);
 
 	return 0;
-- 
2.54.0