[PATCH 5/6] video: panel: renesas-r69328: use common mipi_dsi_dcs_write_seq macro

The current driver defines dsi_generic_write_seq as a wrapper around
mipi_dsi_dcs_write_buffer.

Now that mipi_dsi.h defines such macro, we can use the common one.
Note that we use mipi_dsi_dcs_write_seq instead of
mipi_dsi_generic_write_seq to keep the same behaviour.

While at it also use mipi_dsi_dcs_write_seq instead of direct call to
mipi_dsi_dcs_write_buffer for address_mode, and remove static
address_mode variable.

No functional changes intended.

Signed-off-by: Julien Stephan <[email protected]>
---
 drivers/video/renesas-r69328.c | 69 +++++++++++++++++-------------------------
 1 file changed, 28 insertions(+), 41 deletions(-)

diff --git a/drivers/video/renesas-r69328.c b/drivers/video/renesas-r69328.c
index 0954b04b62e..e4f563c09c5 100644
--- a/drivers/video/renesas-r69328.c
+++ b/drivers/video/renesas-r69328.c
@@ -40,18 +40,6 @@ struct renesas_r69328_priv {
 	struct gpio_desc reset_gpio;
 };
 
-static const u8 address_mode[] = {
-	MIPI_DCS_SET_ADDRESS_MODE
-};
-
-#define dsi_generic_write_seq(dsi, cmd, seq...) do {			\
-		static const u8 b[] = { cmd, seq };			\
-		int ret;						\
-		ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b));	\
-		if (ret < 0)						\
-			return ret;					\
-	} while (0)
-
 static struct display_timing default_timing = {
 	.pixelclock.typ		= 68000000,
 	.hactive.typ		= 720,
@@ -70,8 +58,7 @@ static int renesas_r69328_enable_backlight(struct udevice *dev)
 	struct mipi_dsi_device *dsi = plat->device;
 	int ret;
 
-	mipi_dsi_dcs_write_buffer(dsi, address_mode,
-				  sizeof(address_mode));
+	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE);
 
 	ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT << 4);
 	if (ret < 0) {
@@ -88,35 +75,35 @@ static int renesas_r69328_enable_backlight(struct udevice *dev)
 	mdelay(100);
 
 	/* MACP Off */
-	dsi_generic_write_seq(dsi, R69328_MACP, 0x04);
-
-	dsi_generic_write_seq(dsi, R69328_POWER_SET, 0x14,
-			      0x1d, 0x21, 0x67, 0x11, 0x9a);
-
-	dsi_generic_write_seq(dsi, R69328_GAMMA_SET_A, 0x00,
-			      0x1a, 0x20, 0x28, 0x25, 0x24,
-			      0x26, 0x15, 0x13, 0x11, 0x18,
-			      0x1e, 0x1c, 0x00, 0x00, 0x1a,
-			      0x20, 0x28, 0x25, 0x24, 0x26,
-			      0x15, 0x13, 0x11, 0x18, 0x1e,
-			      0x1c, 0x00);
-	dsi_generic_write_seq(dsi, R69328_GAMMA_SET_B, 0x00,
-			      0x1a, 0x20, 0x28, 0x25, 0x24,
-			      0x26, 0x15, 0x13, 0x11, 0x18,
-			      0x1e, 0x1c, 0x00, 0x00, 0x1a,
-			      0x20, 0x28, 0x25, 0x24, 0x26,
-			      0x15, 0x13, 0x11, 0x18, 0x1e,
-			      0x1c, 0x00);
-	dsi_generic_write_seq(dsi, R69328_GAMMA_SET_C, 0x00,
-			      0x1a, 0x20, 0x28, 0x25, 0x24,
-			      0x26, 0x15, 0x13, 0x11, 0x18,
-			      0x1e, 0x1c, 0x00, 0x00, 0x1a,
-			      0x20, 0x28, 0x25, 0x24, 0x26,
-			      0x15, 0x13, 0x11, 0x18, 0x1e,
-			      0x1c, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, R69328_MACP, 0x04);
+
+	mipi_dsi_dcs_write_seq(dsi, R69328_POWER_SET, 0x14,
+			       0x1d, 0x21, 0x67, 0x11, 0x9a);
+
+	mipi_dsi_dcs_write_seq(dsi, R69328_GAMMA_SET_A, 0x00,
+			       0x1a, 0x20, 0x28, 0x25, 0x24,
+			       0x26, 0x15, 0x13, 0x11, 0x18,
+			       0x1e, 0x1c, 0x00, 0x00, 0x1a,
+			       0x20, 0x28, 0x25, 0x24, 0x26,
+			       0x15, 0x13, 0x11, 0x18, 0x1e,
+			       0x1c, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, R69328_GAMMA_SET_B, 0x00,
+			       0x1a, 0x20, 0x28, 0x25, 0x24,
+			       0x26, 0x15, 0x13, 0x11, 0x18,
+			       0x1e, 0x1c, 0x00, 0x00, 0x1a,
+			       0x20, 0x28, 0x25, 0x24, 0x26,
+			       0x15, 0x13, 0x11, 0x18, 0x1e,
+			       0x1c, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, R69328_GAMMA_SET_C, 0x00,
+			       0x1a, 0x20, 0x28, 0x25, 0x24,
+			       0x26, 0x15, 0x13, 0x11, 0x18,
+			       0x1e, 0x1c, 0x00, 0x00, 0x1a,
+			       0x20, 0x28, 0x25, 0x24, 0x26,
+			       0x15, 0x13, 0x11, 0x18, 0x1e,
+			       0x1c, 0x00);
 
 	/* MACP On */
-	dsi_generic_write_seq(dsi, R69328_MACP, 0x03);
+	mipi_dsi_dcs_write_seq(dsi, R69328_MACP, 0x03);
 
 	ret = mipi_dsi_dcs_set_display_on(dsi);
 	if (ret < 0) {

-- 
2.54.0