Re: [PATCH 1/7] clk: qcom: Add dedicated sa8775p RPMH clock driver

On 8/6/26 18:12, Balaji Selvanathan wrote:
> sa8775p was being handled by the generic clock stub, which just
> no-ops every request. Give it a real driver that provides support for
> get/set rate.
> 
> Signed-off-by: Balaji Selvanathan <[email protected]>
> ---
>   drivers/clk/clk-stub.c           |  1 -
>   drivers/clk/qcom/clock-sa8775p.c | 46 ++++++++++++++++++++++++++++++++++++++++
>   2 files changed, 46 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/clk-stub.c b/drivers/clk/clk-stub.c
> index 4a6c71016da..f7d42892423 100644
> --- a/drivers/clk/clk-stub.c
> +++ b/drivers/clk/clk-stub.c
> @@ -51,7 +51,6 @@ static struct clk_ops stub_clk_ops = {
>   static const struct udevice_id stub_clk_ids[] = {
>   	{ .compatible = "qcom,qcs615-rpmh-clk" },
>   	{ .compatible = "qcom,rpmcc" },
> -	{ .compatible = "qcom,sa8775p-rpmh-clk" },
>   	{ .compatible = "qcom,sc7180-rpmh-clk" },
>   	{ .compatible = "qcom,sc7280-rpmh-clk" },
>   	{ .compatible = "qcom,sdm670-rpmh-clk" },
> diff --git a/drivers/clk/qcom/clock-sa8775p.c b/drivers/clk/qcom/clock-sa8775p.c
> index 7eec4aeae48..49b94078a41 100644
> --- a/drivers/clk/qcom/clock-sa8775p.c
> +++ b/drivers/clk/qcom/clock-sa8775p.c
> @@ -13,8 +13,14 @@
>   #include <linux/bug.h>
>   #include <linux/bitops.h>
>   #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
> +#include <dt-bindings/clock/qcom,rpmh.h>
>   #include "clock-qcom.h"
>   
> +#define TCXO_RATE	38400000
> +
> +/* RPMH_CXO_CLK = bi_tcxo_div2 on sa8775p */
> +#define TCXO_DIV2_RATE	(TCXO_RATE / 2)

Actually this is valid since SM8550, so perhaps it should be a separate standalone driver
for sm8550/sm8650/sa8775p...

Neil

> +
>   #define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR	0x1b040
>   #define USB30_PRIM_MASTER_CLK_CMD_RCGR		0x1b028
>   #define USB3_PRIM_PHY_AUX_CMD_RCGR		0x1b06c
> @@ -275,3 +281,43 @@ U_BOOT_DRIVER(gcc_sa8775p) = {
>   	.bind		= qcom_cc_bind,
>   	.flags		= DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
>   };
> +
> +static ulong sa8775p_rpmh_clk_set_rate(struct clk *clk, ulong rate)
> +{
> +	return (clk->rate = rate);
> +}
> +
> +static ulong sa8775p_rpmh_clk_get_rate(struct clk *clk)
> +{
> +	switch (clk->id) {
> +	case RPMH_CXO_CLK:
> +		return TCXO_DIV2_RATE;
> +	default:
> +		return clk->rate;
> +	}
> +}
> +
> +static int sa8775p_rpmh_clk_nop(struct clk *clk)
> +{
> +	return 0;
> +}
> +
> +static struct clk_ops sa8775p_rpmh_clk_ops = {
> +	.set_rate = sa8775p_rpmh_clk_set_rate,
> +	.get_rate = sa8775p_rpmh_clk_get_rate,
> +	.enable = sa8775p_rpmh_clk_nop,
> +	.disable = sa8775p_rpmh_clk_nop,
> +};
> +
> +static const struct udevice_id sa8775p_rpmh_clk_ids[] = {
> +	{ .compatible = "qcom,sa8775p-rpmh-clk" },
> +	{ }
> +};
> +
> +U_BOOT_DRIVER(sa8775p_rpmh_clk) = {
> +	.name		= "sa8775p_rpmh_clk",
> +	.id		= UCLASS_CLK,
> +	.of_match	= sa8775p_rpmh_clk_ids,
> +	.ops		= &sa8775p_rpmh_clk_ops,
> +	.flags		= DM_FLAG_DEFAULT_PD_CTRL_OFF,
> +};
>