[PATCH v1 06/14] clk: qcom: add TCSRCC driver for nord

Aswin Murugan via U-Boot <[email protected]>
Newsgroups gmane.comp.boot-loaders.u-boot.general,gmane.comp.boot-loaders.u-boot
Message-ID <[email protected]>
Add support for the nord TCSR Clock Controller (TCSRCC).

Implement the qcom,nord-tcsrcc driver to provide the clocks and
resets required by nord platform peripherals.

Signed-off-by: Aswin Murugan <[email protected]>
---
 drivers/clk/qcom/Kconfig             |  8 ++++
 drivers/clk/qcom/Makefile            |  1 +
 drivers/clk/qcom/clock-nord-tcsrcc.c | 71 ++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+)
 create mode 100644 drivers/clk/qcom/clock-nord-tcsrcc.c

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 6266f4a15b3..d7f05a76263 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -90,6 +90,14 @@ config CLK_QCOM_NORD_NWGCC
 	  camera, display, EVA, video, and GPU clocks and resets exposed by
 	  the NWGCC hardware block.
 
+config CLK_QCOM_NORD_TCSRCC
+	bool "Qualcomm Nord TCSRCC"
+	select CLK_QCOM
+	help
+	  Say Y here to enable support for the TCSR Clock Controller on the
+	  Snapdragon Nord SoC. This driver supports the CLKREF enable gates
+	  exposed by the TCSRCC hardware block.
+
 config CLK_QCOM_QCM2290
 	bool "Qualcomm QCM2290 GCC"
 	select CLK_QCOM
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index c9795377d1f..3a2ed6097f9 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CLK_QCOM_NORD) += clock-nord-gcc.o
 obj-$(CONFIG_CLK_QCOM_NORD_NEGCC) += clock-nord-negcc.o
 obj-$(CONFIG_CLK_QCOM_NORD_SEGCC) += clock-nord-segcc.o
 obj-$(CONFIG_CLK_QCOM_NORD_NWGCC) += clock-nord-nwgcc.o
+obj-$(CONFIG_CLK_QCOM_NORD_TCSRCC) += clock-nord-tcsrcc.o
 obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o
 obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o
 obj-$(CONFIG_CLK_QCOM_QCS8300) += clock-qcs8300.o
diff --git a/drivers/clk/qcom/clock-nord-tcsrcc.c b/drivers/clk/qcom/clock-nord-tcsrcc.c
new file mode 100644
index 00000000000..e02285979ad
--- /dev/null
+++ b/drivers/clk/qcom/clock-nord-tcsrcc.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ *
+ */
+
+#include <linux/types.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,nord-tcsrcc.h>
+#include "clock-qcom.h"
+
+static const struct gate_clk nord_tcsrcc_clks[] = {
+	GATE_CLK(TCSR_DP_RX_0_CLKREF_EN,     0xa008, BIT(0)),
+	GATE_CLK(TCSR_DP_RX_1_CLKREF_EN,     0xb008, BIT(0)),
+	GATE_CLK(TCSR_DP_TX_0_CLKREF_EN,     0xc008, BIT(0)),
+	GATE_CLK(TCSR_DP_TX_1_CLKREF_EN,     0xd008, BIT(0)),
+	GATE_CLK(TCSR_DP_TX_2_CLKREF_EN,     0xe008, BIT(0)),
+	GATE_CLK(TCSR_DP_TX_3_CLKREF_EN,     0xf008, BIT(0)),
+	GATE_CLK(TCSR_PCIE_CLKREF_EN,        0x8,    BIT(0)),
+	GATE_CLK(TCSR_UFS_CLKREF_EN,         0x3008, BIT(0)),
+	GATE_CLK(TCSR_USB2_0_CLKREF_EN,      0x4008, BIT(0)),
+	GATE_CLK(TCSR_USB2_1_CLKREF_EN,      0x5008, BIT(0)),
+	GATE_CLK(TCSR_USB2_2_CLKREF_EN,      0x6008, BIT(0)),
+	GATE_CLK(TCSR_USB3_0_CLKREF_EN,      0x8008, BIT(0)),
+	GATE_CLK(TCSR_USB3_1_CLKREF_EN,      0x7008, BIT(0)),
+	GATE_CLK(TCSR_UX_SGMII_0_CLKREF_EN,  0x1008, BIT(0)),
+	GATE_CLK(TCSR_UX_SGMII_1_CLKREF_EN,  0x2008, BIT(0)),
+};
+
+static int nord_tcsrcc_enable(struct clk *clk)
+{
+	struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+	if (priv->data->num_clks < clk->id) {
+		debug("%s: unknown clk id %lu\n", __func__, clk->id);
+		return 0;
+	}
+
+	debug("%s: clk %ld: %s\n", __func__, clk->id, nord_tcsrcc_clks[clk->id].name);
+
+	qcom_gate_clk_en(priv, clk->id);
+
+	return 0;
+}
+
+static struct msm_clk_data nord_tcsrcc_data = {
+	.clks = nord_tcsrcc_clks,
+	.num_clks = ARRAY_SIZE(nord_tcsrcc_clks),
+
+	.enable = nord_tcsrcc_enable,
+};
+
+static const struct udevice_id gcc_nord_tcsrcc_of_match[] = {
+	{
+		.compatible = "qcom,nord-tcsrcc",
+		.data = (ulong)&nord_tcsrcc_data,
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(gcc_nord_tcsrcc) = {
+	.name		= "gcc_nord_tcsrcc",
+	.id		= UCLASS_NOP,
+	.of_match	= gcc_nord_tcsrcc_of_match,
+	.bind		= qcom_cc_bind,
+	.flags		= DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
-- 
2.34.1
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