[PATCH v1 16/23] board: nbxv3: describe the I2C buses and their on module devices
Vincent Jardin <[email protected]>
| Newsgroups | gmane.comp.boot-loaders.u-boot |
|---|---|
| Message-ID | <20260817153144.1951036-17-vjardin__28187.5234142475$1786981021$gmane$org@free.fr> |
Enable the remaining I2C controllers and set the devices on those bus. - &i2c0 (IIC1, on CPU module management) - &i2c1 (IIC2, carrier), &i2c2 (IIC3, carrier devices), &i2c3 (IIC4, carrier logics). - &i2c5 (IIC6, carrier SMBus, SFPs, etc.) The purpose is to help i2c bus and i2c probe to see the same topology than the kernel. defconfig: - CONFIG_CMD_I2C and CONFIG_I2C_SET_DEFAULT_BUS_NUM for the prompt - CONFIG_MISC + CONFIG_I2C_EEPROM + CONFIG_CMD_EEPROM with the board ID EEPROM geometry - CONFIG_DM_PCA953X for the TCA9539s - CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954x for the mux tree Signed-off-by: Vincent Jardin <[email protected]> --- arch/arm/dts/fsl-lx2160a-nbxv3.dts | 219 +++++++++++++++++++++++++++++ configs/nbxv3_tfa_defconfig | 12 ++ 2 files changed, 231 insertions(+) diff --git a/arch/arm/dts/fsl-lx2160a-nbxv3.dts b/arch/arm/dts/fsl-lx2160a-nbxv3.dts index 08d3aee62a7..3b87ee32d94 100644 --- a/arch/arm/dts/fsl-lx2160a-nbxv3.dts +++ b/arch/arm/dts/fsl-lx2160a-nbxv3.dts @@ -66,6 +66,49 @@ &i2c0 { /* IIC1: on module management bus */ status = "okay"; + bootph-all; + label = "iic1-onmodule-mgmt"; + + eeprom@52 { /* Board ID EEPROM */ + compatible = "atmel,24c32"; + reg = <0x52>; + pagesize = <32>; + }; + + gpio@74 { + compatible = "ti,tca9539"; + reg = <0x74>; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = + "boardid-0x0001", "boardid-0x0002", + "boardid-0x0004", "boardid-0x0008", + "boardid-0x0010", "boardid-0x0020", + "boardid-0x0040", "boardid-0x0080", + "boardid-0x0100", "boardid-0x0200", + "boardid-0x0400", "boardid-0x0800", + "boardid-0x1000", "boardid-0x2000", + "boardid-0x4000", "boardid-0x8000"; + }; + + u800: gpio@75 { + compatible = "ti,tca9539"; + reg = <0x75>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + gpio-line-names = + "fap-rst#", + "fap-int#", + "fap-pcie-rst#", + "dpll-fap-rdy#", + "dpll-fap-rst#", + "carrier-gpio5", "carrier-gpio6", "carrier-gpio7", + "carrier-gpio8", "carrier-gpio9", + "carrier-gpio10", "carrier-gpio11", + "", "", "", ""; + }; regulator@10 { compatible = "mps,mpq8785"; @@ -121,3 +164,179 @@ &pcie4 { status = "okay"; }; &pcie5 { status = "okay"; }; &pcie6 { status = "okay"; }; + +&i2c1 { + status = "okay"; + label = "iic2-carrier-i2c0"; +}; + +&i2c2 { + status = "okay"; + label = "iic3-fap-mgmt"; +}; + +&i2c3 { + status = "okay"; + label = "iic4-carrier-mcu"; +}; + +&i2c5 { + status = "okay"; + label = "iic6-carrier-smbus"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@57 { + compatible = "atmel,24c64"; + reg = <0x57>; + pagesize = <32>; + }; + + pca9548@70 { + compatible = "nxp,pca9548"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + tmp411@4c { compatible = "ti,tmp411"; reg = <0x4c>; }; + tmp411@4d { compatible = "ti,tmp411"; reg = <0x4d>; }; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@15 { + compatible = "pmbus"; + reg = <0x15>; + regulator-name = "psu-48v"; + pmbus,num-pages = <2>; + }; + eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + tmp411@4c { compatible = "ti,tmp411"; reg = <0x4c>; }; + tmp411@4d { compatible = "ti,tmp411"; reg = <0x4d>; }; + + gpio@75 { + compatible = "ti,tca9539"; + reg = <0x75>; + #gpio-cells = <2>; + gpio-controller; + }; + + carrier_u186: gpio@76 { + compatible = "ti,tca9539"; + reg = <0x76>; + #gpio-cells = <2>; + gpio-controller; + /* P0_4 = fan-en-pwr -- FAN power rail enable, U186.P0_4 */ + }; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + pca9548@71 { + compatible = "nxp,pca9548"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; }; + i2c@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; }; + i2c@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; }; + i2c@3 { reg = <3>; #address-cells = <1>; #size-cells = <0>; }; + i2c@4 { reg = <4>; #address-cells = <1>; #size-cells = <0>; }; + i2c@5 { reg = <5>; #address-cells = <1>; #size-cells = <0>; }; + i2c@6 { reg = <6>; #address-cells = <1>; #size-cells = <0>; }; + i2c@7 { reg = <7>; #address-cells = <1>; #size-cells = <0>; }; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + pca9548@71 { + compatible = "nxp,pca9548"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; }; + i2c@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; }; + i2c@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; }; + i2c@3 { reg = <3>; #address-cells = <1>; #size-cells = <0>; }; + i2c@4 { reg = <4>; #address-cells = <1>; #size-cells = <0>; }; + i2c@5 { reg = <5>; #address-cells = <1>; #size-cells = <0>; }; + i2c@6 { reg = <6>; #address-cells = <1>; #size-cells = <0>; }; + i2c@7 { reg = <7>; #address-cells = <1>; #size-cells = <0>; }; + }; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + pca9548@71 { + compatible = "nxp,pca9548"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + fan-controller@2c { compatible = "microchip,emc2305"; reg = <0x2c>; }; + eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; }; + tmp411@4c { compatible = "ti,tmp411"; reg = <0x4c>; }; + tmp411@4d { compatible = "ti,tmp411"; reg = <0x4d>; }; + }; + + i2c@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; }; + i2c@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + regulator@1f { compatible = "mps,mpq8785"; reg = <0x1f>; }; + tmp411@4c { compatible = "ti,tmp411"; reg = <0x4c>; }; + }; + + i2c@5 { reg = <5>; #address-cells = <1>; #size-cells = <0>; }; + i2c@6 { reg = <6>; #address-cells = <1>; #size-cells = <0>; }; + i2c@7 { reg = <7>; #address-cells = <1>; #size-cells = <0>; }; + }; + }; + }; +}; diff --git a/configs/nbxv3_tfa_defconfig b/configs/nbxv3_tfa_defconfig index 7043c5c0df6..7af9124bc6e 100644 --- a/configs/nbxv3_tfa_defconfig +++ b/configs/nbxv3_tfa_defconfig @@ -33,6 +33,11 @@ CONFIG_PCI_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_CMDLINE_PS_SUPPORT=y CONFIG_CMD_HISTORY=y +CONFIG_CMD_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y @@ -45,7 +50,14 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_FSL_DDR_INTLV_256B=y +CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x52 CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_ESDHC=y -- 2.43.0