[PATCH 3/7] arm64: dts: imx95-navq: add lpi2c3 and subnodes

Add LPI2C3 and the GPIO expander subnodes. Add the aliases for the rest
of LPI2C and GPIO nodes.

Signed-off-by: Elena Popa <[email protected]>
---
 arch/arm/dts/imx95-navq.dts | 46 +++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/arch/arm/dts/imx95-navq.dts b/arch/arm/dts/imx95-navq.dts
index fc36c8b567f..581d725406b 100644
--- a/arch/arm/dts/imx95-navq.dts
+++ b/arch/arm/dts/imx95-navq.dts
@@ -18,6 +18,15 @@
 	compatible = "fsl,imx95-navq", "fsl,imx95";
 
 	aliases {
+		gpio0 = &gpio1;
+		gpio1 = &gpio2;
+		gpio2 = &gpio3;
+		gpio3 = &gpio4;
+		gpio4 = &gpio5;
+		i2c0 = &lpi2c1;
+		i2c1 = &lpi2c2;
+		i2c2 = &lpi2c3;
+		i2c3 = &lpi2c4;
 		mmc0 = &usdhc1;
 		mmc1 = &usdhc2;
 		serial0 = &lpuart1;
@@ -32,6 +41,13 @@
 		reg = <0x0 0x80000000 0 0x80000000>;
 	};
 
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <3300000>;
+		regulator-name = "+V3.3_SW";
+	};
+
 	reg_usdhc2_vmmc: regulator-usdhc2 {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
@@ -69,6 +85,29 @@
 	dma-channels = <30>;
 };
 
+&lpi2c3 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c3>;
+	status = "okay";
+
+	i2c3_gpio_expander_21: gpio@21 {
+		compatible = "nxp,pcal6408";
+		#gpio-cells = <2>;
+		gpio-controller;
+		reg = <0x21>;
+		vcc-supply = <&reg_3p3v>;
+	};
+
+	i2c3_gpio_expander_23: gpio@23 {
+		compatible = "nxp,pcal6524";
+		#gpio-cells = <2>;
+		gpio-controller;
+		reg = <0x23>;
+		vcc-supply = <&reg_3p3v>;
+	};
+};
+
 &lpuart1 {
 	/* console */
 	pinctrl-names = "default";
@@ -77,6 +116,13 @@
 };
 
 &scmi_iomuxc {
+	pinctrl_lpi2c3: lpi2c3grp {
+		fsl,pins = <
+			IMX95_PAD_GPIO_IO28__LPI2C3_SDA				0x40000b9e
+			IMX95_PAD_GPIO_IO29__LPI2C3_SCL				0x40000b9e
+		>;
+	};
+
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX		0x31e
-- 
2.43.0