Re: [PATCH v1 1/1] arm: draeger: Dräger M48 on NXP i.MX6(Q) and Intel/Altera SoCFPGA Cyclone V devicetree.

Hi Petko,

On Thu, Aug 20, 2026 at 3:19 AM Petko Manolov
<[email protected]> wrote:

> Unfortunately this board runs QNX, not Linux, so upstreaming them doesn't make
> sense.

I don't think the OS running on the board changes this requirement.

Devicetree describes the hardware, not Linux, and DTs from the Linux
tree are also consumed by other projects, including U-Boot. In U-Boot,
we have been moving towards using the upstream Linux devicetree
sources rather than maintaining independent copies of board DTs.

There is also an important review aspect here. The Linux devicetree
maintainers and the subsystem/SoC
maintainers review the hardware description and its bindings,
including dt-schema validation. Simply running the
validation tools locally is useful, but it is not a replacement for that review.

For the i.MX6 part in particular, this is a well-supported platform
upstream, so I don't see a reason why the
M48 hardware description could not be submitted to the Linux
devicetree tree even if the product itself boots QNX.

My suggestion is still to split this work and submit the i. MX6 and
SoCFPGA DTs to the respective Linux maintainers first.MX6 and
SoCFPGA DTs to the respective Linux maintainers first. Once they have
been accepted upstream, U-Boot can consume those
DTs from the upstream Linux tree and keep only the U-Boot-specific
additions in the *-u-boot.dtsi files.

> Can i use some sort of DT validation tool that pass kernel's requirements?

Yes, the kernel provides dt_binding_check and dtbs_check targets for
validating DT bindings and DTs against dt-schema.
You should run these before submission, but passing them alone does
not replace upstream DT review.