selective drc error supression
Pierce Keating <[email protected]> Fri, 20 Apr 2007 15:26:17 -0700 (PDT)
| Newsgroups | gmane.comp.cad.electric.bugs |
|---|---|
| Message-ID | <[email protected]> |
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Hello,
Is there a way to stop designated DRC errors? For example, when a Metal1-P Active connector is placed on a P transistor active region, a DRC error is generated:
DRC error 4 of 7: Spacing (layer P-Active): node Metal-1-P-Active-Con OVERLAPS arc P-Active [rule 2.2]
However I am merely connecting the transistor drain, so I would like to suppress this error.
Other times like layers might be intended to touch and a DRC error is correctly generated. However, I would often like to selectively suppress these errors as well. Is there a way to do this?
Thanks very much,
Pierce
---------------------------------
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<div>Hello,</div> <div> </div> <div>Is there a way to stop designated DRC errors? For example, when a Metal1-P Active connector is placed on a P transistor active region, a DRC error is generated:</div> <div> </div><FONT size=2> <div><STRONG>DRC error 4 of 7: Spacing (layer P-Active): node Metal-1-P-Active-Con OVERLAPS arc P-Active [rule 2.2]</STRONG></div> <div> </div> <div>However I am merely connecting the transistor drain, so I would like to suppress this error. </div> <div> </div> <div>Other times like layers might be intended to touch and a DRC error is correctly generated. However, I would often like to selectively suppress these errors as well. Is there a way to do this? </div> <div> </div> <div>Thanks very much,</div> <div>Pierce</div></FONT><p> 
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