Re: selective drc error supression

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Hello Pierce,

Try to connect port of P-transistor and Metal1-P
Active contact by
a short P-Active arc.

If nodes are not connected by arc, Electric doesn't
know that you want them to be connected,
and it thinks that you overlapped them accidently.

  -Dima

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Hello,
   
  Is there a way to stop designated DRC errors? For example, when a Metal1-P Active connector is placed on a P transistor active region, a DRC error is generated:
   
  DRC error 4 of 7: Spacing (layer P-Active): node Metal-1-P-Active-Con OVERLAPS arc P-Active [rule 2.2]
   
  However I am merely connecting the transistor drain, so I would like to suppress this error. 
   
  Other times like layers might be intended to touch and a DRC error is correctly generated. However, I would often like to selectively suppress these errors as well. Is there a way to do this? 
   
  Thanks very much,
  Pierce

       
---------------------------------
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<div>Hello,</div>  <div>&nbsp;</div>  <div>Is there a way to stop designated DRC errors? For example, when a Metal1-P Active connector is placed on a P transistor active region, a DRC error is generated:</div>  <div>&nbsp;</div><FONT size=2>  <div><STRONG>DRC error 4 of 7: Spacing (layer P-Active): node Metal-1-P-Active-Con OVERLAPS arc P-Active [rule 2.2]</STRONG></div>  <div>&nbsp;</div>  <div>However I am merely connecting the transistor drain, so I would like to suppress this error. </div>  <div>&nbsp;</div>  <div>Other times like layers might be intended to touch and a DRC error is correctly generated. However, I would&nbsp;often like to selectively suppress these errors as well. Is there a way to do this? </div>  <div>&nbsp;</div>  <div>Thanks very much,</div>  <div>Pierce</div></FONT><p>&#32;



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<a href="http://us.rd.yahoo.com/evt=48245/*http://autos.yahoo.com/new_cars.html;_ylc=X3oDMTE1YW1jcXJ2BF9TAzk3MTA3MDc2BHNlYwNtYWlsdGFncwRzbGsDbmV3LWNhcnM-">new cars at Yahoo! Autos.</a>

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