Re: Simuler
Steven Rubin <[email protected]> Thu, 07 Jul 2005 12:15:00 -0400
| Newsgroups | gmane.comp.cad.electric.general |
|---|---|
| Message-ID | <[email protected]> |
At 07:28 AM 7/7/2005, you wrote:
>Salut,
>je veux bien savoir pourrais simuler une cellule
>Verilog ou VHDL?
>Si je dois utiliser un simulateur externe, comment il
>faut que je fasse?
>Et si vous avez un exemple d'un code Verilog ou VHDL à
>simuler, SVP, envoi les moi.
Google has translated your question as follows:
"I want to know how to simulate a Verilog cell or VHDL? If I must use an
external simulator, how it is necessary that I make? And if you have an
example of a Verilog code or VHDL to be simulated, PLEASE, sending them me."
Electric has a built-in simulator called ALS which can simulate structural
VHDL (that is, it cannot handle behavioral VHDL). An example is given in
the user's manual (in the section about ALS, see
http://www.staticfreesoft.com/jmanual/mchap09-05-02.html).
If you have a circuit, it can be converted to Verilog, but there is no
Verilog simulator included with Electric: you must obtain that on your
own. The only other built-in simulator is IRSIM, which does not work from
Verilog or VHDL.
-Steven Rubin