CPU simulation and instruction simulation

Muhui Jiang <[email protected]>
Newsgroups gmane.comp.debugging.valgrind
Message-ID <CAF_eCepGTyKPY89O5iGHKAHNSws-Mw6MmpQyjEDCcR+2cQNWcg@mail.gmail.com>
Hi all

I am new to Valgrind and have some questions about the principles of
Valgrind.

According to the manual,
https://valgrind.org/docs/manual/manual-core.html#manual-core.whatdoes
"Your program is then run on a synthetic CPU provided by the Valgrind core."
"Valgrind simulates every single instruction your program executes"

I am curious that as a binary instrumentation framework, why Valgrind needs
to simulate the CPU and instruction execution. It seems that the host and
guest architecture must be the same due to the multiple syscalls.  If so,
why not use the host CPU to run the translated binary directly instead of
simulation? Simulated instruction execution might be different from the
execution on physical devices.

The other question is that what part is simulated for a CPU except for the
instruction execution. Are the memory model, cache, and registers all
simulated/emulated. Any suggestions and comments are welcome. Many Thanks

Regards
Muhui

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