Re: RC5 with FPGAs
"Olivier Meyer" <[email protected]> Fri, 8 Sep 2006 11:57:43 -0600
| Newsgroups | gmane.comp.distributed-net.hardware |
|---|---|
| Message-ID | <[email protected]> |
I am currently interested in Achronix Semiconductor's FPGAs, which can operate at 2 GHz On 9/8/06, Olivier Meyer <[email protected]> wrote: > > What about the partial matches: how would one do that in an FPGA? > > > On 9/7/06, david fleischer <cilantro_il-/[email protected] > wrote: > > > > That's interesting. > > How does byte-reversed increment work? > > > > You suggest doing 6 rounds instead of 3. This to avoid > > the penalty of storing the array until the key is > > tested. But the RC5 algorithm is separated into > > stages. You need all the data for the last step, so > > you need at least to have gone through 2 rounds when > > starting to encrypt the words. > > How does the pyramid work? > > > > David > > > > --- Dan Oetting <dan_oetting-r9/[email protected]> wrote: > > > > > > > > On Sep 6, 2006, at 12:07 PM, david fleischer wrote: > > > > > > > By the way, I'm not sure pipelining will bring you > > > > great benefits in an FPGA. A back of the laptop > > > > calculation tells me that you'll need > > > approximately > > > > 1Kbit of memory per key. This may mean that most > > > of > > > > the archirecture will be shoveling data back and > > > forth > > > > to the core. > > > > > > You don't have to store the data. You can recompute > > > it. Instead of 3 > > > rounds with intermediate data stored between rounds > > > you implement 6 > > > rounds in a pyramid so the correct data is provided > > > to each stage as > > > it's needed.. > > > > > > > I also have a question, can someone help me figure > > > out > > > > the code in the source ANSI cores? I cannot > > > understand > > > > how the key increment is done. (that is to say, I > > > see > > > > what the code is doing, but I cannot figure out > > > why > > > > this does any good.) > > > > > > What the code is doing is incrementing the key in > > > byte reversed > > > order. Why this is done is because the calculations > > > in the first 2 > > > 1/2 iterations of the first round then become > > > constants so the loop > > > can run a few keys per second faster. It won't help > > > your hardware > > > unless your design is fully pipelined so you can > > > consolidate the > > > first few sets of gates in each pipe. But you still > > > need to implement > > > the byte reversed increment to be compatible with > > > the d.net project. > > > > > > _______________________________________________ > > > Hardware mailing list > > > Hardware-Ra3b/QYEcJ3d140v2zMXi0fjHoOT/h/[email protected] > > > > > http://lists.distributed.net/mailman/listinfo/hardware > > > > > > > _______________________________________________ > > Hardware mailing list > > Hardware-Ra3b/QYEcJ3d140v2zMXi0fjHoOT/h/[email protected] > > http://lists.distributed.net/mailman/listinfo/hardware > > > > > > -- > ----------------------- > Olivier V. Meyer > Congress shall make no law respecting an establishment of religion, or > prohibiting the free exercise thereof; or abridging the freedom of speech, > or of the press; or the right of the people peaceably to assemble, and to > petition the government for a redress of grievances. > -- ----------------------- Olivier V. Meyer Congress shall make no law respecting an establishment of religion, or prohibiting the free exercise thereof; or abridging the freedom of speech, or of the press; or the right of the people peaceably to assemble, and to petition the government for a redress of grievances. _______________________________________________ Hardware mailing list Hardware-Ra3b/QYEcJ3d140v2zMXi0fjHoOT/h/[email protected] http://lists.distributed.net/mailman/listinfo/hardware