Re: Cuda client
Joseph Kaye <[email protected]> Thu, 31 Jan 2013 14:26:06 -0600
| Newsgroups | gmane.comp.distributed-net.rc5 |
|---|---|
| Message-ID | <[email protected]> |
On 1/31/2013 12:18 PM, Décio Luiz Gazzoni Filho wrote: > Just to clear up a common misconception: Intel never *removed* an > instruction from a new processor that was present in an earlier > processor, including rol. That would break up backward compatibility > which is a main selling point of the x86 architecture (and by > extension the Wintel platform). What did happen is that there is a > piece of hardware used for efficient (usually single-cycle) > implementation of variable-sized shifts and rotations (the shl, shr, > sar, rol, ror, rcl and rcr instructions) -- that hardware is called a > barrel shifter. it has historically been implemented on every Intel > processor since the 80386 or so, but don't quote me on that. Certainly > the classic 1993-era Pentium did have it. The barrel shifter is what > wasn't present on the Pentium 4, and the reason why the rol > instruction executed slower (I believe it took 4 cycles). So the > instruction has always existed, even on the Pentium 4 -- it had to > because of backward compatibility reasons -- but the hardware for > efficiently implementing it didn't exist only on the P4 chips, and > Intel has added it back on the newer Core chips, which is why they > perform better. Décio _______________________________________________ > rc5 mailing list rc5-Ra3b/QYEcJ3d140v2zMXi0fjHoOT/h/[email protected] > http://lists.distributed.net/mailman/listinfo/rc5 Thanks Décio. I knew it was something like that, but I was bit foggy on the particulars. --Joseph _______________________________________________ rc5 mailing list rc5-Ra3b/QYEcJ3d140v2zMXi0fjHoOT/h/[email protected] http://lists.distributed.net/mailman/listinfo/rc5