Re: issue about SYSRET in Bochs
"Stanislav" <[email protected]> Sat, 11 May 2019 12:15:35 +0300
| Newsgroups | gmane.comp.emulators.bochs.devel |
|---|---|
| Message-ID | <[email protected]> |
This is a multipart message in MIME format. --===============6844184679347786432== Content-Type: multipart/alternative; boundary="----=_NextPart_000_0025_01D507F3.4C1883A0" Content-Language: en-il This is a multipart message in MIME format. ------=_NextPart_000_0025_01D507F3.4C1883A0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Intel and AMD differ a bit in their long mode implementation. There are some instruction which behave a bit different between Intel = and AMD and Bochs had choose which one to support. Ideally we would support both but seems like it don=E2=80=99t care, = software already aligned with the differences and could live with both = options. =20 You quoting Intel SDM which says: =20 SS.Selector <=3D (IA32_STAR[63:48]+8) OR 3; (* RPL forced to 3 *) (* Set rest of SS to a fixed value *) SS.Base <=3D 0; (* Flat segment *) SS.Limit <=3D FFFFFH; (* With 4-KByte granularity, implies a 4-GByte = limit *) SS.Type <=3D 3; (* Read/write data, accessed *) SS.S <=3D 1; SS.DPL <=3D 3; SS.P <=3D 1; SS.B <=3D 1; (* 32-bit stack segment*) SS.G <=3D 1; (* 4-KByte granularity *) =20 While Bochs implements AMD spec which looks like: =20 SS.sel =3D MSR_STAR.SYSRET_CS + 8 // SS selector is changed, // SS base, limit, attributes unchanged. =20 Did you see any software which cares for the difference ? =20 Thanks, Stanislav =20 From: =E6=B8=A9=E5=86=80=E7=83=A8 via bochs-developers = <[email protected]>=20 Sent: Wednesday, 17 April 2019 3:27 To: [email protected] Subject: [Bochs-developers] issue about SYSRET in Bochs =20 hi guys:=20 I found there=E2=80=99s another place different between Intel SDM and = Bochs code.=20 Intel SDM states that operating SYSRET will update SS.xxx registers to = specific values (in SDM p1809) In Bochs, for field base/limit/g/b, such update seems missing . =20 I tried some modification over it, in bochs2.6.9/cpu/proc_ctrl.cc = (starts at line 1325) is this a reasonable fix by what I meant? BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid =3D SegValidCache = | SegAccessROK | SegAccessWOK | SegAccessROK4G | SegAccessWOK4G; BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.p =3D 1; BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl =3D 3; BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.segment =3D 1; /* = data/code segment */ BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.type =3D = BX_DATA_READ_WRITE_ACCESSED; BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base = =3D 0; /* base address */ BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled = =3D 0xFFFFFFFF; /* scaled segment limit */ BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.g = =3D 1; /* 4k granularity */ BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b = =3D 1; =20 =20 =20 ------=_NextPart_000_0025_01D507F3.4C1883A0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable <html xmlns:v=3D"urn:schemas-microsoft-com:vml" = xmlns:o=3D"urn:schemas-microsoft-com:office:office" = xmlns:w=3D"urn:schemas-microsoft-com:office:word" = xmlns:m=3D"http://schemas.microsoft.com/office/2004/12/omml" = xmlns=3D"http://www.w3.org/TR/REC-html40"><head><meta = http-equiv=3DContent-Type content=3D"text/html; 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margin-bottom:.0001pt; text-align:justify; font-size:10.5pt; font-family:DengXian;} a:link, span.MsoHyperlink {mso-style-priority:99; color:blue; text-decoration:underline;} a:visited, span.MsoHyperlinkFollowed {mso-style-priority:99; color:#954F72; text-decoration:underline;} p {mso-style-priority:99; mso-margin-top-alt:auto; margin-right:0cm; mso-margin-bottom-alt:auto; margin-left:0cm; font-size:12.0pt; font-family:"Times New Roman",serif;} p.msonormal0, li.msonormal0, div.msonormal0 {mso-style-name:msonormal; mso-margin-top-alt:auto; margin-right:0cm; mso-margin-bottom-alt:auto; margin-left:0cm; font-size:12.0pt; font-family:"Times New Roman",serif;} span.EmailStyle19 {mso-style-type:personal; font-family:"Calibri",sans-serif; color:#1F497D;} span.EmailStyle20 {mso-style-type:personal-compose; font-family:"Calibri",sans-serif; color:windowtext;} .MsoChpDefault {mso-style-type:export-only; font-size:10.0pt;} @page WordSection1 {size:612.0pt 792.0pt; margin:72.0pt 90.0pt 72.0pt 90.0pt;} div.WordSection1 {page:WordSection1;} --></style><!--[if gte mso 9]><xml> <o:shapedefaults v:ext=3D"edit" spidmax=3D"1026" /> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext=3D"edit"> <o:idmap v:ext=3D"edit" data=3D"1" /> </o:shapelayout></xml><![endif]--></head><body lang=3DEN-US link=3Dblue = vlink=3D"#954F72"><div class=3DWordSection1><p class=3DMsoNormal><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= >Intel and AMD differ a bit in their long mode = implementation.<o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= >There are some instruction which behave a bit different between Intel = and AMD and Bochs had choose which one to = support.<o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= >Ideally we would support both but seems like it don=E2=80=99t care, = software already aligned with the differences and could live with both = options.<o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= ><o:p> </o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= >You quoting Intel SDM which says:<o:p></o:p></span></p><p = class=3DMsoNormal><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= ><o:p> </o:p></span></p><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.Select= or <=3D</span><span style=3D'font-size:9.0pt;font-family:Symbol'> = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>(IA32_STA= R[63:48]+8) OR 3; (* RPL forced to 3 *)<o:p></o:p></span></p><p = class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>(* Set = rest of SS to a fixed value *)<o:p></o:p></span></p><p class=3DMsoNormal = align=3Dleft style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.Base = <=3D</span><span style=3D'font-size:9.0pt;font-family:Symbol'> = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>0; (* = Flat segment *)<o:p></o:p></span></p><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.Limit = </span><span style=3D'font-size:9.0pt;font-family:Symbol'><=3D = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>FFFFFH; = (* With 4-KByte granularity, implies a 4-GByte limit = *)<o:p></o:p></span></p><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.Type = <=3D</span><span style=3D'font-size:9.0pt;font-family:Symbol'> = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>3; (* = Read/write data, accessed *)<o:p></o:p></span></p><p class=3DMsoNormal = align=3Dleft style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.S = </span><span style=3D'font-size:9.0pt;font-family:Symbol'><=3D = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>1;<o:p></= o:p></span></p><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.DPL = </span><span style=3D'font-size:9.0pt;font-family:Symbol'><=3D = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>3;<o:p></= o:p></span></p><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.P = </span><span style=3D'font-size:9.0pt;font-family:Symbol'><=3D = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>1;<o:p></= o:p></span></p><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.B = </span><span style=3D'font-size:9.0pt;font-family:Symbol'><=3D = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>1; (* = 32-bit stack segment*)<o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>SS.G = </span><span style=3D'font-size:9.0pt;font-family:Symbol'><=3D = </span><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>1; (* = 4-KByte granularity *)<o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'><o:p>&nbs= p;</o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'>While = Bochs implements AMD spec which looks like:<o:p></o:p></span></p><p = class=3DMsoNormal><span = style=3D'font-size:9.0pt;font-family:"NeoSansIntel",sans-serif'><o:p>&nbs= p;</o:p></span></p><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left;text-autospace:none'><span = style=3D'font-size:10.0pt;font-family:Courier'>SS.sel =3D = MSR_STAR.SYSRET_CS + 8 // SS selector is = changed,<o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:10.0pt;font-family:Courier'>// SS base, limit, = attributes unchanged.<o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:10.0pt;font-family:Courier'><o:p> </o:p></span></= p><p class=3DMsoNormal><span = style=3D'font-size:10.0pt;font-family:Courier'>Did you see any software = which cares for the difference ?<o:p></o:p></span></p><p = class=3DMsoNormal><span = style=3D'font-size:10.0pt;font-family:Courier'><o:p> </o:p></span></= p><p class=3DMsoNormal><span = style=3D'font-size:10.0pt;font-family:Courier'>Thanks,<o:p></o:p></span><= /p><p class=3DMsoNormal><span = style=3D'font-size:10.0pt;font-family:Courier'>Stanislav</span><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= ><o:p></o:p></span></p><p class=3DMsoNormal><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'= ><o:p> </o:p></span></p><div><div = style=3D'border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0cm = 0cm 0cm'><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left'><b><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif'>From:</span><= /b><span style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif'> = </span><span style=3D'font-size:11.0pt;font-family:"MS = Gothic"'>=E6=B8=A9=E5=86=80</span><span = style=3D'font-size:11.0pt;font-family:"Microsoft = JhengHei",sans-serif'>=E7=83=A8</span><span = style=3D'font-size:11.0pt;font-family:"Calibri",sans-serif'> via = bochs-developers <[email protected]> = <br><b>Sent:</b> Wednesday, 17 April 2019 3:27<br><b>To:</b> = [email protected]<br><b>Subject:</b> = [Bochs-developers] issue about SYSRET in = Bochs<o:p></o:p></span></p></div></div><p class=3DMsoNormal align=3Dleft = style=3D'text-align:left'><o:p> </o:p></p><p = class=3DMsoNormal><span = style=3D'font-family:"Calibri",sans-serif;color:black;mso-fareast-languag= e:ZH-CN'>hi guys: </span><span = style=3D'font-size:12.0pt;font-family:SimSun;mso-fareast-language:ZH-CN'>= <o:p></o:p></span></p><p style=3D'text-indent:9.0pt'><span = style=3D'font-size:10.5pt;font-family:"Calibri",sans-serif;mso-fareast-la= nguage:ZH-CN'>I found there=E2=80=99s another place different between = Intel SDM and Bochs code. <o:p></o:p></span></p><p = style=3D'text-indent:9.0pt'><span = style=3D'font-size:10.5pt;font-family:"Calibri",sans-serif;mso-fareast-la= nguage:ZH-CN'>Intel SDM states that operating SYSRET will update SS.xxx = registers to specific values (in SDM p1809)<o:p></o:p></span></p><p = style=3D'text-indent:9.0pt'><span = style=3D'font-size:10.5pt;font-family:"Calibri",sans-serif;mso-fareast-la= nguage:ZH-CN'>In Bochs, for field base/limit/g/b, such update seems = missing . <o:p></o:p></span></p><p = style=3D'text-indent:10.5pt'><span = style=3D'font-size:10.5pt;font-family:"Calibri",sans-serif;color:red;mso-= fareast-language:ZH-CN'>I tried some modification over it, in = bochs2.6.9/cpu/proc_ctrl.cc (starts at line 1325) is this a = reasonable fix by what I meant?<o:p></o:p></span></p><p = style=3D'margin-bottom:12.0pt'><span = style=3D'font-size:10.5pt;font-family:"Calibri",sans-serif;mso-fareast-la= nguage:ZH-CN'> BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.valid =3D SegValidCache | = SegAccessROK | SegAccessWOK | SegAccessROK4G | = SegAccessWOK4G;<br> BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.p =3D = 1;<br> BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.dpl =3D = 3;<br> BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.segment =3D 1; /* data/code segment = */<br> BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.type =3D = BX_DATA_READ_WRITE_ACCESSED;<br><span = style=3D'color:red'><br> BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.u.segment.base &n= bsp; =3D 0; /* base address */<br> = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled =3D = 0xFFFFFFFF; /* scaled segment limit */<br> = BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.u.segment.g  = ; =3D 1; /* 4k granularity = */<br> BX_CPU_THIS_PTR = sregs[BX_SEG_REG_SS].cache.u.segment.d_b &nb= sp; =3D 1;</span><o:p></o:p></span></p><p = class=3DMsoNormal><span = style=3D'font-size:12.0pt;font-family:SimSun;color:black;mso-fareast-lang= uage:ZH-CN'><o:p> </o:p></span></p><p class=3DMsoNormal><span = style=3D'mso-fareast-language:ZH-CN'><o:p> </o:p></span></p><p = class=3DMsoNormal><span = style=3D'mso-fareast-language:ZH-CN'><o:p> </o:p></span></p></div></= body></html> ------=_NextPart_000_0025_01D507F3.4C1883A0-- --===============6844184679347786432== Content-Type: text/plain; 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