Re: MONITOR and MWAIT Instruction Emulation in BOCHS

Hi,

 

This invalidation is exists because of the way MONITOR is implemented in
Bochs.

 

The monitor itself resides in the memory object (BX_MEM_C class) for emu
performance reasons, a write to a monitored address supposed to wakeup a CPU
which is sleeping in MWAIT.

I didn't want to pay monitor check for each write by the CPU - this would be
huge perf loss.

Instead the monitored page is marked as "no direct access" in the guest2host
TLB which would guarantee that each write to monitored page would reach
BX_MEM_C.

 

The TLB invalidation is done to guarantee that no other CPU has TLB entry
with "direct access" allowed to the same page otherwise a wakeup write would
not reach BX_MEM_C and would be missed.

 

Stanislav

 

From: Xin Tong [mailto:[email protected]] 
Sent: Sunday, October 21, 2012 4:37 PM
To: [email protected]
Subject: [Bochs-developers] MONITOR and MWAIT Instruction Emulation in BOCHS

 

I am looking at how MONITOR  and MWAIT  are emulated in BOCHS. one thing i
do not get is why bx_pc_system.invlpg(paddr) is called when Mointor paddr is
called. bx_pc_system.invlpg(paddr) calls TLB_invlpg on all CPUs. I do not
why TLB_invlpg is called as there is no invalidation going on in the Monitor
instruction.

Xin

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