Re: bochs on sparc/solaris

On Fri, Dec 28, 2012 at 08:37:46AM +0200, Stanislav wrote:
> There are several ways to workaround this.
> 
> First and preferable is to find appropriate compiler extension to mark
> memory access as unaligned.
> Smth like:
> 
> +#define WriteHostWordToLittleEndian(hostPtr,  nativeVar16) \
> +    *((Bit16u UNALIGNED*)(hostPtr)) = bswap16(nativeVar16)
> 
> Second is to rewrite the memory access macros (for all data sizes) to
> read/write data in byte granularity ad then to collect them into register.
> It was in old Bochs versions before but was removed because we assumed that
> almost all BE systems already support unaligned access.
> Here is the block (taken from Bochs 2.1 sources):
> 
> #define WriteHostWordToLittleEndian(hostPtr,  nativeVar16) { \
>     ((Bit8u *)(hostPtr))[0] = (Bit8u)  (nativeVar16); \
>     ((Bit8u *)(hostPtr))[1] = (Bit8u) ((nativeVar16)>>8); \
>     }

For gcc compiled code, you can define a structure member to have a
smaller alignment that would be usual. Referencing it on (say) sparc
will cause the compiler to generate the required byte accesses and
shifts.

For ppc (with recent gcc) you want to use the gcc builtin for
byteswap - so that the compiler can use the byteswapping memory
accesses (same is probably true for some (not-ancient) sparc cpu).

Faulting mis-aligned accesses is more comman than you you might think.
Hardware supports gets less trivial when the the word crosses page
boundaries.

	David

-- 
David Laight: [email protected]

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