Re: [PATCH 19/20] target/arm: Implement PMULL, PMLAL

Richard Henderson <[email protected]>
Newsgroups gmane.comp.emulators.qemu
Message-ID <[email protected]>
On 7/28/26 09:37, Peter Maydell wrote:
> On Tue, 21 Jul 2026 at 19:49, Richard Henderson
> <[email protected]> wrote:
>>
>> Signed-off-by: Richard Henderson <[email protected]>
>> ---
> 
> 
>> +void HELPER(sve_pmull_q)(void *vd, void *vn, void *vm, uint32_t desc)
>> +{
>> +    intptr_t opr_sz = simd_oprsz(desc);
>> +    uint64_t *n = vn, *m = vm;
>> +    Int128 *d0 = vd;
>> +    Int128 *d1 = vd + sizeof(ARMVectorReg);
>> +
>> +    for (intptr_t i = 0; i < opr_sz / 16; ++i) {
>> +        Int128 rl = clmul_64(n[2 * i + 0], m[2 * i + 0]);
>> +        Int128 rh = clmul_64(n[2 * i + 1], m[2 * i + 1]);
>> +        d0[i] = rl;
>> +        d1[i] = rh;
> 
> Doesn't this put the two 64-bit halves of the results in the
> wrong order on big-endian hosts? Compare how we handle
> writing back the Int128 result in sve2_adcl_d.

Yep, good catch.


r~
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