Re: [PATCH 10/11] tcg/loongarch64: Import REVBIT insns

Hi Richard,

On 31/7/26 02:05, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <[email protected]>
> ---
>   tcg/loongarch64/tcg-insn-defs.c.inc | 944 ++++++++++++++--------------
>   1 file changed, 487 insertions(+), 457 deletions(-)
> 
> diff --git a/tcg/loongarch64/tcg-insn-defs.c.inc b/tcg/loongarch64/tcg-insn-defs.c.inc
> index 6bb8656fd8..c308b770ef 100644
> --- a/tcg/loongarch64/tcg-insn-defs.c.inc
> +++ b/tcg/loongarch64/tcg-insn-defs.c.inc
> @@ -4,7 +4,7 @@
>    *
>    * This file is auto-generated by genqemutcgdefs from
>    * https://github.com/loongson-community/loongarch-opcodes,
> - * from commit 7f353fb69bd99ce6edfad7ad63948c4bb526f0bf.
> + * from commit 40ea52087699392ad911387b666541891d33da31.

I couldn't find it then noticed your
https://github.com/loongson-community/loongarch-opcodes/pull/10,
so pending it to be merged?

>    * DO NOT EDIT.
>    */
>   
> @@ -18,6 +18,8 @@ typedef enum {
>       OPC_REVB_2H = 0x00003000,
>       OPC_REVB_2W = 0x00003800,
>       OPC_REVB_D = 0x00003c00,
> +    OPC_REVBIT_W = 0x00005000,
> +    OPC_REVBIT_D = 0x00005400,
>       OPC_SEXT_H = 0x00005800,
>       OPC_SEXT_B = 0x00005c00,
>       OPC_ADD_W = 0x00100000,
> @@ -545,14 +547,14 @@ typedef enum {
>       OPC_XVLDI = 0x77e00000,
>   } LoongArchInsn;
>   
> -static int32_t __attribute__((unused))
> -encode_d_slot(LoongArchInsn opc, uint32_t d)
> +static int32_t __attribute__((unused)) encode_d_slot(LoongArchInsn opc,
> +                                                     uint32_t d)

What triggered this code churn? Could we commit before generating for
REVBIT opcodes?

>   {
>       return opc | d;
>   }