Re: [PATCH v10 1/2] target/riscv/kvm: Synchronize privilege mode

On 7/30/2026 2:19 AM, Xie Bo wrote:
> The KVM core register synchronization currently omits the vCPU privilege
> mode. As a result, env.priv can be stale when the migration stream is saved
> and the destination can restore the vCPU in the wrong mode.
> 
> Read and write the KVM core mode register together with the other core
> registers. The generic RISC-V CPU VMState already carries env.priv, so no
> migration format change is required.
> 
> Signed-off-by: Xie Bo <[email protected]>
> ---

Reviewed-by: Daniel Henrique Barboza <[email protected]>

>   target/riscv/kvm/kvm-cpu.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index 495cb42dc8..8218832fbe 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -603,6 +603,12 @@ static int kvm_riscv_get_regs_core(CPUState *cs)
>       }
>       env->pc = reg;
>   
> +    ret = kvm_get_one_reg(cs, RISCV_CORE_REG(mode), &reg);
> +    if (ret) {
> +        return ret;
> +    }
> +    env->priv = reg;
> +
>       for (i = 1; i < 32; i++) {
>           uint64_t id = KVM_RISCV_REG_ID_ULONG(KVM_REG_RISCV_CORE, i);
>           ret = kvm_get_one_reg(cs, id, &reg);
> @@ -628,6 +634,12 @@ static int kvm_riscv_put_regs_core(CPUState *cs)
>           return ret;
>       }
>   
> +    reg = env->priv;
> +    ret = kvm_set_one_reg(cs, RISCV_CORE_REG(mode), &reg);
> +    if (ret) {
> +        return ret;
> +    }
> +
>       for (i = 1; i < 32; i++) {
>           uint64_t id = KVM_RISCV_REG_ID_ULONG(KVM_REG_RISCV_CORE, i);
>           reg = env->gpr[i];