[PATCH v2 7/9] arm/aspeed: Drop ASPEED_RAM_SIZE
Peter Xu <[email protected]>
| Newsgroups | gmane.comp.emulators.qemu |
|---|---|
| Message-ID | <[email protected]> |
QEMU has switched to 64bit-only hosts for all system/user emulations. It's not needed anymore. Signed-off-by: Peter Xu <[email protected]> --- include/hw/arm/aspeed.h | 7 ------- hw/arm/aspeed_ast2600_anacapa.c | 2 +- hw/arm/aspeed_ast2600_bletchley.c | 2 +- hw/arm/aspeed_ast2600_catalina.c | 2 +- hw/arm/aspeed_ast2600_fby35.c | 2 +- hw/arm/aspeed_ast2600_fuji.c | 2 +- hw/arm/aspeed_ast2600_gb200nvl.c | 2 +- 7 files changed, 6 insertions(+), 13 deletions(-) diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index a00238ed74..7a012d87de 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -25,13 +25,6 @@ DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass, #define ASPEED_MAC2_ON (1 << 2) #define ASPEED_MAC3_ON (1 << 3) -/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ -#if HOST_LONG_BITS == 32 -#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) -#else -#define ASPEED_RAM_SIZE(sz) (sz) -#endif - struct AspeedMachineState { MachineState parent_obj; diff --git a/hw/arm/aspeed_ast2600_anacapa.c b/hw/arm/aspeed_ast2600_anacapa.c index 65d6b0faa2..45f7a25efd 100644 --- a/hw/arm/aspeed_ast2600_anacapa.c +++ b/hw/arm/aspeed_ast2600_anacapa.c @@ -18,7 +18,7 @@ #define ANACAPA_BMC_HW_STRAP1 0x00002002 #define ANACAPA_BMC_HW_STRAP2 0x00000000 -#define ANACAPA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) +#define ANACAPA_BMC_RAM_SIZE (2 * GiB) /* * "Anacapa HPM (MB)" FRU data. Generated with frugen. diff --git a/hw/arm/aspeed_ast2600_bletchley.c b/hw/arm/aspeed_ast2600_bletchley.c index b7e84db143..8f9061c472 100644 --- a/hw/arm/aspeed_ast2600_bletchley.c +++ b/hw/arm/aspeed_ast2600_bletchley.c @@ -18,7 +18,7 @@ /* Bletchley hardware value */ #define BLETCHLEY_BMC_HW_STRAP1 0x00002000 #define BLETCHLEY_BMC_HW_STRAP2 0x00000801 -#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) +#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB) static void bletchley_bmc_i2c_init(AspeedMachineState *bmc) { diff --git a/hw/arm/aspeed_ast2600_catalina.c b/hw/arm/aspeed_ast2600_catalina.c index f714c9d1b3..c328997668 100644 --- a/hw/arm/aspeed_ast2600_catalina.c +++ b/hw/arm/aspeed_ast2600_catalina.c @@ -20,7 +20,7 @@ /* Catalina hardware value */ #define CATALINA_BMC_HW_STRAP1 0x00002002 #define CATALINA_BMC_HW_STRAP2 0x00000800 -#define CATALINA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) +#define CATALINA_BMC_RAM_SIZE (2 * GiB) #define TYPE_TMP75 TYPE_TMP105 #define TYPE_TMP421 "tmp421" diff --git a/hw/arm/aspeed_ast2600_fby35.c b/hw/arm/aspeed_ast2600_fby35.c index f624427070..1d546b1f0a 100644 --- a/hw/arm/aspeed_ast2600_fby35.c +++ b/hw/arm/aspeed_ast2600_fby35.c @@ -17,7 +17,7 @@ #define TYPE_LM75 TYPE_TMP105 #define TYPE_TMP421 "tmp421" -#define FBY35_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) +#define FBY35_BMC_RAM_SIZE (2 * GiB) static const uint8_t fby35_nic_fruid[] = { 0x01, 0x00, 0x00, 0x01, 0x0f, 0x20, 0x00, 0xcf, 0x01, 0x0e, 0x19, 0xd7, diff --git a/hw/arm/aspeed_ast2600_fuji.c b/hw/arm/aspeed_ast2600_fuji.c index 37db252e27..cb987e2eff 100644 --- a/hw/arm/aspeed_ast2600_fuji.c +++ b/hw/arm/aspeed_ast2600_fuji.c @@ -22,7 +22,7 @@ /* Fuji hardware value */ #define FUJI_BMC_HW_STRAP1 0x00000000 #define FUJI_BMC_HW_STRAP2 0x00000000 -#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) +#define FUJI_BMC_RAM_SIZE (2 * GiB) static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, I2CBus **channels) diff --git a/hw/arm/aspeed_ast2600_gb200nvl.c b/hw/arm/aspeed_ast2600_gb200nvl.c index ad9a10110b..7abd934624 100644 --- a/hw/arm/aspeed_ast2600_gb200nvl.c +++ b/hw/arm/aspeed_ast2600_gb200nvl.c @@ -16,7 +16,7 @@ /* GB200NVL hardware value */ #define GB200NVL_BMC_HW_STRAP1 0x000000C0 #define GB200NVL_BMC_HW_STRAP2 0x00000003 -#define GB200NVL_BMC_RAM_SIZE ASPEED_RAM_SIZE(1 * GiB) +#define GB200NVL_BMC_RAM_SIZE (1 * GiB) static const uint8_t gb200nvl_bmc_fruid[] = { 0x01, 0x00, 0x00, 0x01, 0x0b, 0x00, 0x00, 0xf3, 0x01, 0x0a, 0x19, 0x1f, -- 2.54.0