Re: GDB/mapper cache problems

Hi -

> The processor is an arm7t with a 32 bit bus. The flash is a 16 bit device. 
> [...] In our actual hardware, we have a mapper that will read and 
> register two 16 bit addresses on the flash and shift/concatenate them to form 
> a single 32 bit word when the processor executes a 32 bit read. [...]

I don't recall exactly now, but it may be that the plain memory mapper
component's optional stride/width syntax might specify exactly this.
Append ",2,2" after your flash address-range string and see what bus
API calls flow downstream.  (See siddoc hw-mapper-basic.)


- FChE

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