[PATCH v7 08/20] xen/riscv: introduce init interrupt controller operations
Oleksii Kurochko <[email protected]> Tue, 4 Aug 2026 17:47:58 +0200
| Newsgroups | gmane.comp.emulators.xen.devel |
|---|---|
| Message-ID | <370ce245e6974650bd6efab9a4eba841f14552d5.1785836421.git.oleksii.kurochko@gmail.com> |
Introduce intc_hw_init_ops structure to avoid risky mix of init function and non-init function. Signed-off-by: Oleksii Kurochko <[email protected]> Acked-by: Jan Beulich <[email protected]> --- Changes in v5-7: - Nothin changed. Only rebase. --- Changes in v4: - Use __initconstrel instead of __initconst for aplic_init_ops as both initialized fields incur a relocation. - Add Acked-by: ... . --- Changes in v3: - Use __initconst instead of __initdata for const intc_hw_init_ops. - Embed const struct intc_hw_operations *ops into intc_hw_init_ops so register_intc_ops() takes a single pointer argument. --- Changes in v2: - New patch. --- --- xen/arch/riscv/aplic.c | 8 ++++++-- xen/arch/riscv/include/asm/intc.h | 10 +++++++--- xen/arch/riscv/intc.c | 11 ++++++++--- 3 files changed, 21 insertions(+), 8 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 9f023db5d525..d08401db46b3 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -325,12 +325,16 @@ static const hw_irq_controller aplic_xen_irq_type = { static const struct intc_hw_operations aplic_ops = { .info = &aplic_info, - .init = aplic_init, .host_irq_type = &aplic_xen_irq_type, .handle_interrupt = aplic_handle_interrupt, .set_irq_type = aplic_set_irq_type, }; +static const struct intc_hw_init_ops __initconstrel aplic_init_ops = { + .ops = &aplic_ops, + .init = aplic_init, +}; + static int cf_check aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize, unsigned int *out_hwirq, @@ -366,7 +370,7 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat) dt_irq_xlate = aplic_irq_xlate; - register_intc_ops(&aplic_ops); + register_intc_ops(&aplic_init_ops); /* Enable supervisor external interrupt */ csr_set(CSR_SIE, BIT(IRQ_S_EXT, UL)); diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 675f703ec97f..d7b34fc15ad1 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -28,8 +28,6 @@ struct intc_info { struct intc_hw_operations { /* Hold intc hw information */ const struct intc_info *info; - /* Initialize the intc and the boot CPU */ - int (*init)(void); /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; @@ -43,9 +41,15 @@ struct intc_hw_operations { void (*handle_interrupt)(struct cpu_user_regs *regs); }; +struct intc_hw_init_ops { + const struct intc_hw_operations *ops; + /* Initialize the intc and the boot CPU */ + int (*init)(void); +}; + void intc_preinit(void); -void register_intc_ops(const struct intc_hw_operations *ops); +void register_intc_ops(const struct intc_hw_init_ops *init_ops); void intc_init(void); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index ea317aea5ad8..3600d23bdb5b 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -12,9 +12,12 @@ static const struct intc_hw_operations *__ro_after_init intc_hw_ops; -void __init register_intc_ops(const struct intc_hw_operations *ops) +static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; + +void __init register_intc_ops(const struct intc_hw_init_ops *init_ops) { - intc_hw_ops = ops; + intc_hw_ops = init_ops->ops; + intc_hw_init_ops = init_ops; } void __init intc_preinit(void) @@ -27,7 +30,9 @@ void __init intc_preinit(void) void __init intc_init(void) { - if ( intc_hw_ops->init() ) + ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); + + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); } -- 2.55.0