Re: [PATCH 5/5] x86/nmi: Don't configure EvtSel repeatedly

On 05.08.2026 14:45, Andrew Cooper wrote:
> In both setup_{k7,p6}_watchdog(), EvtSel0 is first zeroed, then written with
> everything but the enable bit, then written with the enable bit.
> 
> setup_p4_watchdog() is slightly more complicated, owing to what
> appears to be a bug introduced by commit 2a2bd8de16b6 ("Clean up NMI
> watchdog handler."), which causes a second bit to be temporarily
> different too.
> 
> The middle of the three writes is useless in all cases.  Drop it.

Spotting the 1st write in setup_p4_watchdog() wasn't quite as easy, as
MSR_P4_BPU_CCCR0 (as passed to clear_msr_range()) has nothing to do with
MSR_P4_IQ_CCCR0. Using unrelated MSR names there is as unhelpful as using
raw hex numbers.

> While doing this, rename the 'counter' parameter for
> setup_p6_watchdog().  It is the event which is passed in; the counter
> is always counter 0.
> 
> No functional change.

These sequences of writes almost look as if they were trying to cover for
errata. Are you sufficiently sure there are none anywhere, for this to
truly be no functional change? If so, ...

> Signed-off-by: Andrew Cooper <[email protected]>

Acked-by: Jan Beulich <[email protected]>

Jan