Re: [PATCH v1 12/17] xen/riscv: extend exception tables with type and data fields

Oleksii Kurochko <[email protected]>
Newsgroups gmane.comp.emulators.xen.devel
Message-ID <[email protected]>

On 8/17/26 1:33 PM, Oleksii Kurochko wrote:
>>
>>> +    BUG_ON(!trap_info);
>>> +
>>> +    trap_info->sepc = csr_read(CSR_SEPC);
>>> +    trap_info->scause = csr_read(CSR_SCAUSE);
>>> +    trap_info->stval = csr_read(CSR_STVAL);
>>
>> Do you really need to re-read all three registers here? Didn't you 
>> read at least
>> scause already, in order to make it here in the first place?
> 
> Agree, ->scause and ->sepc are already read.

scause should be re-reaad as we don't save it inside cpu_user_regs 
structure.

~ Oleksii
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