Re: [PATCH 3/5] x86/nmi: Misc style fixes
Andrew Cooper <[email protected]>
| Newsgroups | gmane.comp.emulators.xen.devel |
|---|---|
| Message-ID | <[email protected]> |
On 05/08/2026 2:52 pm, Jan Beulich wrote: > On 05.08.2026 14:45, Andrew Cooper wrote: >> * Drop trailing whitespace >> * Sort includes, dropping asm/mc146818rtc.h and asm/div64.h as unused >> * Brace position, and types >> >> No functional change. >> >> Signed-off-by: Andrew Cooper <[email protected]> > Acked-by: Jan Beulich <[email protected]> Thanks. > albeit I would have suggested ... > >> @@ -310,15 +308,18 @@ static void setup_p4_watchdog(void) >> if ( boot_cpu_data.x86_num_siblings == 2 ) >> nmi_p4_cccr_val |= P4_CCCR_OVF_PMI1; >> >> - if (!(misc_enable & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL)) >> + if ( !(misc_enable & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL) ) >> clear_msr_range(0x3F1, 2); >> /* MSR 0x3F0 seems to have a default value of 0xFC00, but current >> docs doesn't fully define it, so leave it alone for now. */ >> - if (boot_cpu_data.model >= 0x3) { >> + if ( boot_cpu_data.model >= 0x3 ) >> + { >> /* MSR_P4_IQ_ESCR0/1 (0x3ba/0x3bb) removed */ >> clear_msr_range(0x3A0, 26); >> clear_msr_range(0x3BC, 3); >> - } else { >> + } >> + else >> + { >> clear_msr_range(0x3A0, 31); >> } > ... to instead drop the figure braces here. There's an easier fix. Model 3 was the first 64bit-capable P4. I'll do a separate patch to take out the entire else clause. ~Andrew