[PATCH 3/5] xen/riscv: make Svpbmt no longer a required extension
Baptiste Le Duc <[email protected]>
| Newsgroups | gmane.comp.emulators.xen.devel |
|---|---|
| Message-ID | <1787844809.8631fc262581453bbf619ec5b2062170.1a043dad34e000c4f3@vates.tech> |
required_extensions[] panics at boot if Svpbmt is missing, which is a problem on hardware that doesn't implement it. Xen already checks Svpbmt at runtime in some places (vcpu_csr_init()), but not everywhere: p2m_pte_from_mfn() and the PAGE_HYPERVISOR_NOCACHE/WC macros still set the raw PTE_PBMT* encoding unconditionally. Drop Svpbmt from required_extensions, and introduce pte_pbmt(), which masks the requested PBMT encoding down to 0 when Svpbmt is unavailable, using it in both remaining unguarded spots. Assisted-by: Claude:claude-opus-5 Signed-off-by: Baptiste Le Duc <[email protected]> --- xen/arch/riscv/cpufeature.c | 1 - xen/arch/riscv/include/asm/page.h | 8 ++++++-- xen/arch/riscv/p2m.c | 2 +- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index 92235fdfd5..900cb9d772 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -157,7 +157,6 @@ static const struct riscv_isa_ext_data __initconst required_extensions[] = { RISCV_ISA_EXT_DATA(zifencei), RISCV_ISA_EXT_DATA(zihintpause), RISCV_ISA_EXT_DATA(zbb), - RISCV_ISA_EXT_DATA(svpbmt), }; static bool __init is_lowercase_extension_name(const char *str) diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index 5c02f64a17..6a3749526d 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -11,6 +11,7 @@ #include <xen/types.h> #include <asm/atomic.h> +#include <asm/cpufeature.h> #include <asm/page-bits.h> #define VPN_MASK (PAGETABLE_ENTRIES - 1UL) @@ -54,6 +55,9 @@ #define PAGE_HYPERVISOR_RX (PTE_LEAF_DEFAULT | PTE_EXECUTABLE) #define PAGE_HYPERVISOR PAGE_HYPERVISOR_RW + +#define pte_pbmt(pbmt) \ + (riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ? (pbmt) : 0UL) /* * PAGE_HYPERVISOR_NOCACHE is used for ioremap(). * @@ -61,8 +65,8 @@ * is that IO is non-idempotent and strongly ordered, which makes it a good * candidate for mapping IOMEM. */ -#define PAGE_HYPERVISOR_NOCACHE (PAGE_HYPERVISOR_RW | PTE_PBMT_IO) -#define PAGE_HYPERVISOR_WC (PAGE_HYPERVISOR_RW | PTE_PBMT_NOCACHE) +#define PAGE_HYPERVISOR_NOCACHE (PAGE_HYPERVISOR_RW | pte_pbmt(PTE_PBMT_IO)) +#define PAGE_HYPERVISOR_WC (PAGE_HYPERVISOR_RW | pte_pbmt(PTE_PBMT_NOCACHE)) /* * The PTE format does not contain the following bits within itself; diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 11dc289f0f..f6e635ec1d 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -683,7 +683,7 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, switch ( t ) { case p2m_mmio_direct_io: - e.pte |= PTE_PBMT_IO; + e.pte |= pte_pbmt(PTE_PBMT_IO); break; default: