Re: DRI integration

Michel Dänzer <[email protected]>
Newsgroups gmane.comp.freedesktop.xserver
Organization Debian, XFree86
Message-ID <[email protected]>
On Fri, 2003-11-14 at 09:13, Keith Whitwell wrote:
> Michel Dänzer wrote:
> > On Fri, 2003-11-14 at 00:05, Keith Whitwell wrote:
> > 
> >>The radeon, for instance, doesn't have a linear layout of the z buffer, 
> >>so writing to it will not give expected results (whatever those might 
> >>be).
> > 
> > Linear access could probably be achieved with a surface translation
> > though.
> 
> I'm not sure what they are - is this a hardware facility I've missed?

Yes, see the SURFACE[0-7]_{INFO,LOWER_BOUND,UPPER_BOUND} registers.


-- 
Earthling Michel Dänzer      |     Debian (powerpc), X and DRI developer
Software libre enthusiast    |   http://svcs.affero.net/rm.php?r=daenzer
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