[Bug target/126446] [13/14/15/16/17 Regression] X86-64: ICE at -O1 -mavx2 during RTL pass: vregs since r12-2085

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126446

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
typedef signed char V __attribute__((vector_size (16)));
signed char a;

void
foo ()
{
  V b;
  long long c = ~2878966870562407444LL;
  b[c] = 0;
  a = b[0];
}
started earlier though (again -O1 -mavx2), with
r11-5074-g287cc750b0887e86cb309d976b17c7ee95f7ad48
It doesn't ICE with
typedef signed char V __attribute__((vector_size (16)));
signed char a;

void
foo ()
{
  V b;
  long long c = 935LL;
  b[c] = 0;
  a = b[0];
}
though, even with -O1 -mavx2
-fdisable-tree-{dse{1,2,3,5},cddce{1,3},dce{1,2,3,4,7}}
Before isel, we have
-  VIEW_CONVERT_EXPR<signed char[16]>(b)[-2878966870562407445] = 0;
+  VIEW_CONVERT_EXPR<signed char[16]>(b)[935] = 0;
but isel turns it in the former case into
-  _7 = .VEC_SET (_6, 0, -2878966870562407445);
I'd say we should fix this in both isel and in the backend.