[Bug target/126449] New: [17 Regression] ICE in gen_reg_rtx, at emit-rtl.cc:1192, mcmodel=large, since r17-2468

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126449

            Bug ID: 126449
           Summary: [17 Regression] ICE in gen_reg_rtx, at
                    emit-rtl.cc:1192, mcmodel=large, since r17-2468
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: mjires at gcc dot gnu.org
                CC: majin at gcc dot gnu.org
  Target Milestone: ---
            Target: riscv64-linux-gnu

Compiling reduced testcase g++.dg/pr98136.C results in ICE since
r17-2468-gbfc82936d1ea07.

$ cat pr98136.C
struct AddIn {
  virtual ~AddIn();
};
struct Base {
  virtual ~Base();
};
struct Deriv : Base, AddIn {};
int main() { Deriv deriv; }


$ riscv64-linux-gnu-g++ pr98136.C -mcmodel=large
pr98136.C: In member function ‘virtual void Deriv::_ZThn8_N5DerivD1Ev()’:
pr98136.C:8:27: internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1192
    8 | int main() { Deriv deriv; }
      |                           ^
0x390d217 internal_error(char const*, ...)
        /home/mjires/git/GCC/master/gcc/diagnostic-global-context.cc:787
0x39186e3 fancy_abort(char const*, int, char const*)
        /home/mjires/git/GCC/master/gcc/diagnostics/context.cc:1813
0x13b2106 gen_reg_rtx(machine_mode)
        /home/mjires/git/GCC/master/gcc/emit-rtl.cc:1192
0x1e0df60 riscv_legitimize_call_address(rtx_def*, bool)
        /home/mjires/git/GCC/master/gcc/config/riscv/riscv.cc:8114
0x2aaa515 gen_sibcall(rtx_def*, rtx_def*, rtx_def*)
        /home/mjires/git/GCC/master/gcc/config/riscv/riscv.md:4184
0x1e0e466 riscv_output_mi_thunk
        /home/mjires/git/GCC/master/gcc/config/riscv/riscv.cc:11935
0x12e44ab expand_thunk(cgraph_node*, bool, bool)
        /home/mjires/git/GCC/master/gcc/symtab-thunks.cc:388
0x12f9fdf cgraph_node::assemble_thunks_and_aliases()
        /home/mjires/git/GCC/master/gcc/cgraphunit.cc:1796
0x12fa007 cgraph_node::assemble_thunks_and_aliases()
        /home/mjires/git/GCC/master/gcc/cgraphunit.cc:1818
0x12fa2ca cgraph_node::expand()
        /home/mjires/git/GCC/master/gcc/cgraphunit.cc:1947
0x12fa655 cgraph_order_sort::process()
        /home/mjires/git/GCC/master/gcc/cgraphunit.cc:2156
0x12fbf88 output_in_order
        /home/mjires/git/GCC/master/gcc/cgraphunit.cc:2225
0x12fbf88 symbol_table::compile()
        /home/mjires/git/GCC/master/gcc/cgraphunit.cc:2432
0x12ff46e symbol_table::finalize_compilation_unit()
        /home/mjires/git/GCC/master/gcc/cgraphunit.cc:2626
/home/mjires/built/master-riscv64-linux-gnu/libexec/gcc/riscv64-linux-gnu/17.0.0/cc1plus
-quiet -imultilib . -D_GNU_SOURCE pr98136.C -quiet -dumpdir a- -dumpbase
pr98136.C -dumpbase-ext .C -mcmodel=large
-march=rv64imafdc_zicsr_zifencei_zmmul_zaamo_zalrsc_zca_zcd -mabi=lp64d
-misa-spec=20191213 -mtls-dialect=trad
-march=rv64imafdc_zicsr_zifencei_zmmul_zca_zcd -o /tmp/ccZ2bMrP.s
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.


$ riscv64-linux-gnu-g++ -v
Using built-in specs.
COLLECT_GCC=riscv64-linux-gnu-g++
COLLECT_LTO_WRAPPER=/home/mjires/built/master-riscv64-linux-gnu/libexec/gcc/riscv64-linux-gnu/17.0.0/lto-wrapper
Target: riscv64-linux-gnu
Configured with: /home/mjires/git/GCC/master/configure
--prefix=/home/mjires/built/master-riscv64-linux-gnu --target=riscv64-linux-gnu
--disable-bootstrap --enable-languages=c,c++,fortran --disable-multilib
--enable-checking
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 17.0.0 20260728 (experimental) (GCC)