[Bug target/124043] gcc.target/arm/crypto-*_u32.c missed optimization cause test failure

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D124043

--- Comment #9 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Richard Earnshaw <[email protected]=
>:

https://gcc.gnu.org/g:d782390469b7555f6cf4d8ff29777c941717c5d2

commit r17-2931-gd782390469b7555f6cf4d8ff29777c941717c5d2
Author: Richard Earnshaw <[email protected]>
Date:   Wed Jul 29 13:18:20 2026 +0100

    arm: Thumb2 reg preferencing for vfp variant of movsi [PR124043]

    This pattern currently masks a lot of alternatives from register
    preferencing, but this can cause the register allocator to prefer to
    spill and reload from the stack when transferring values between core
    and VFP registers.  (This is probably exacerbated by LRA also chosing to
    disparage such alternatives when doing final register selection.)  This
    patch is not a complete rework of the preferences, but does try to bring
    the alternatives closer to the way we handle registers when compiling in
    arm mode (A32).

    This pattern needs reworking - it probably hasn't been looked at
    properly since we moved to LRA.

    gcc/ChangeLog:

            PR target/124043
            * config/arm/vfp.md (thumb2_movsi_vfp): Don't hide the t->r
            alternative from register preferencing.

    gcc/testsuite/ChangeLog:

            PR target/124043
            * gcc.target/arm/crypto-vsha1cq_u32.c: Remove xfail on vdup.
            * gcc.target/arm/crypto-vsha1h_u32.c: Likewise.
            * gcc.target/arm/crypto-vsha1mq_u32.c: Likewise.
            * gcc.target/arm/crypto-vsha1pq_u32.c: Likewise.=