[Bug target/126589] [13/14/15/16/17 Regression] Complex-mul vectorisation not honoring signed zeros

"cvs-commit at gcc dot gnu.org via Gcc-bugs" <[email protected]> Tue, 04 Aug 2026 14:26:23 +0000
Newsgroups gmane.comp.gcc.bugs
Message-ID <[email protected]/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D126589

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Tamar Christina <[email protected]=
>:

https://gcc.gnu.org/g:30b4b8f2baf42c8842233a2d075c77a01eee4d29

commit r17-2947-g30b4b8f2baf42c8842233a2d075c77a01eee4d29
Author: Tamar Christina <[email protected]>
Date:   Tue Aug 4 15:25:54 2026 +0100

    AArch64: block COMPLEX_MUL when honoring signed zeros [PR126589]

    as PR126589 points out on AArch64 we emulate COMPLEX_MUL using COMPLEX_=
FMA
by
    seeding the accumulator with +0.0.  However depending on the
rounding/flushing
    behavior we can end up with the wrong sign on the zero result.

    There's no real performant way to fix this (though I wonder if a BSL to
copy
    the sign bits would be faster) so this adds !HONOR_SIGNED_ZEROS as a
requirement
    for AArch64's expanders for cmul.

    gcc/ChangeLog:

            PR target/126589
            * config/aarch64/aarch64-simd.md (cmul<conj_op><mode>3): Require
not
            honor signed zeros.
            * config/aarch64/aarch64-sve.md (cmul<conj_op><mode>3): Require=
 not
            honor signed zeros.

    gcc/testsuite/ChangeLog:

            PR target/126589
            * gcc.target/aarch64/sve/complex_mul_1.c: Add -fno-signed-zeros.
            * gfortran.target/aarch64/pr122408_1.f90: Likewise.
            * gcc.target/aarch64/pr126589.c: New test.
            * gcc.target/aarch64/sve/pr126589.c: New test.=