[Bug target/126619] [17 Regression] Slowdown of s116 from TSVC on x86_64 since r17-2876-gf0bd50e8317926

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126619

--- Comment #6 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
(In reply to Hongtao Liu from comment #5)
> (In reply to Roger Sayle from comment #4)
> > Created attachment 65243 [details]
> > proposed patch
> > 
> > Hi Hongtao,
> > Here's my patch to dramatically improve the code generated for V4SF vector
> > initialization, which also happens to do exactly as you propose, i.e. fall
> > back to ix86_expand_vector_init_concat in the general case.  This has
> > survived bootstrap and is currently regression testing (which will identify
> > the testcases that need to be updated, in addition to spotting any problems).
> > 
> > Please let me know if you have any feedback before I officially post the
> > full patch to gcc-patches for review.  Sorry for any inconvenience.
> 
> It hits ICE for below testcase with -O2 -mno-sse2
> 
> typedef float v4sf __attribute__((vector_size(16)));
> v4sf fab00 (float a, float b) { return (v4sf){a,b,0,0}; }

another case, not regression from the patch attached, but regressed by r17-2876

v4sf fm0m0 (float* a, float* b) { return (v4sf) { *a, 0, *b, 0};}

generate an additional shufps:

Before r17-2876:

"fm0m0":
        movss   xmm1, DWORD PTR [rsi]
        movss   xmm0, DWORD PTR [rdi]
        movlhps xmm0, xmm1
        ret

After r17-2876:
"fm0m0":
        movss   xmm0, DWORD PTR [rdi]
        movss   xmm1, DWORD PTR [rsi]
        unpcklps        xmm0, xmm1
        shufps  xmm0, xmm0, 152
        ret