[Bug target/126676] [17 Regression] ICE with XFmode under -mavx10.2 -mapxf
"lin1.hu at intel dot com via Gcc-bugs" <[email protected]>
| Newsgroups | gmane.comp.gcc.bugs |
|---|---|
| Message-ID | <[email protected]/bugzilla/> |
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126676
--- Comment #4 from Hu Lin <lin1.hu at intel dot com> ---
(In reply to Uroš Bizjak from comment #3)
> Comment on attachment 65254 [details]
> Untested fix.
>
> > /* We only have vcomisbf16, No vcomubf16 nor vcomxbf16 */
> > if (GET_MODE (op0) != E_BFmode)
> > {
> >- if (TARGET_AVX10_2 && (code == EQ || code == NE))
> >+ /* VCOMX/VUCOMX are SSE instructions, so they only exist for the
> >+ modes an xmm register can hold: there is no XFmode form. */
> >+ if (TARGET_AVX10_2
> >+ && (code == EQ || code == NE)
> >+ && (GET_MODE (op0) == HFmode
> >+ || SSE_FLOAT_MODE_P (GET_MODE (op0))))
>
> If the target pattern does not use SSE_FLOAT_MODE_P predicate, then just use
> (GET_MODE (op0) == SFmode || GET_MODE (op0) == DFmode) directly.
Thanks.