[gcc(refs/vendors/ibm/heads/dmr-support)] rs6000: Add reload_tdo_* patterns

https://gcc.gnu.org/g:0bcfb2eaeb7eade836af2bfdea56a67c4ba0e6fc

commit 0bcfb2eaeb7eade836af2bfdea56a67c4ba0e6fc
Author: Surya Kumari Jangala <[email protected]>
Date:   Wed Jul 8 21:32:51 2026 -0500

    rs6000: Add reload_tdo_* patterns
    
    Add reload_tdo_* patterns to load and store DMRs to memory.

Diff:
---
 gcc/config/rs6000/mma.md    | 69 +++++++++++++++++++++++++++++++++++++++++++++
 gcc/config/rs6000/rs6000.cc |  6 ++++
 2 files changed, 75 insertions(+)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 1026a5be8898..656c8bcf92f0 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -95,6 +95,8 @@
    UNSPEC_DMF_EXTRACT512
    UNSPEC_DMF_INSERT1024
    UNSPEC_DM_EXTRACT1024
+   UNSPEC_DMR_RELOAD_FROM_MEMORY
+   UNSPEC_DMR_RELOAD_TO_MEMORY
    UNSPEC_DMF_DMXOR
    UNSPEC_DMF_DMXVI8GERX4
    UNSPEC_DMF_DMXVI8GERX4PP
@@ -562,6 +564,73 @@
   gcc_unreachable ();
 })
 
+(define_insn_and_split "reload_tdo_load"
+  [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+        (unspec:TDO [(match_operand:TDO 1 "memory_operand" "m")]
+                    UNSPEC_DMR_RELOAD_FROM_MEMORY))
+   (clobber (match_operand:OO 2 "vsx_register_operand" "=wa"))
+   (clobber (match_operand:OO 3 "vsx_register_operand" "=wa"))
+   (clobber (match_operand:OO 4 "vsx_register_operand" "=wa"))
+   (clobber (match_operand:OO 5 "vsx_register_operand" "=wa"))]
+  "TARGET_DMF"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+{
+  rtx dest = operands[0];
+  rtx src = operands[1];
+  rtx pair0 = operands[2];
+  rtx pair1 = operands[3];
+  rtx pair2 = operands[4];
+  rtx pair3 = operands[5];
+
+  if (BYTES_BIG_ENDIAN)
+    {
+      emit_move_insn (pair0, adjust_address (src, OOmode, 0));
+      emit_move_insn (pair1, adjust_address (src, OOmode, 32));
+      emit_move_insn (pair2, adjust_address (src, OOmode, 64));
+      emit_move_insn (pair3, adjust_address (src, OOmode, 96));
+    }
+  else
+    {
+      emit_move_insn (pair3, adjust_address (src, OOmode, 0));
+      emit_move_insn (pair2, adjust_address (src, OOmode, 32));
+      emit_move_insn (pair1, adjust_address (src, OOmode, 64));
+      emit_move_insn (pair0, adjust_address (src, OOmode, 96));
+    }
+  emit_insn (gen_dm_insert1024 (dest, pair0, pair1, pair2, pair3));
+  DONE;
+}
+  [(set_attr "max_prefixed_insns" "4")])
+
+
+;; Reload dense math register to memory
+(define_insn_and_split "reload_tdo_store"
+  [(set (match_operand:TDO 0 "memory_operand" "=m")
+        (unspec:TDO [(match_operand:TDO 1 "dmr_register_operand" "wD")]
+                    UNSPEC_DMR_RELOAD_TO_MEMORY))
+   (clobber (match_operand:XO 2 "vsx_register_operand" "=wa"))]
+  "TARGET_DMF"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+{
+  rtx dest = operands[0];
+  rtx src = operands[1];
+  rtx tmp_vsx_512 = operands[2];
+  rtx high_mem = adjust_address (dest, XOmode, BYTES_BIG_ENDIAN ? 0 : 64);
+  rtx low_mem = adjust_address (dest, XOmode, BYTES_BIG_ENDIAN ? 64 : 0);
+
+  emit_insn (gen_dm_extract512 (tmp_vsx_512, src, const0_rtx));
+  emit_move_insn (high_mem, tmp_vsx_512);
+
+  emit_insn (gen_dm_extract512 (tmp_vsx_512, src, const1_rtx));
+  emit_move_insn (low_mem, tmp_vsx_512);
+  DONE;
+}
+  [(set_attr "max_prefixed_insns" "4")])
+
+
 (define_expand "mma_assemble_acc"
   [(match_operand:XO 0 "accumulator_operand")
    (match_operand:V16QI 1 "mma_assemble_input_operand")
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 09a453efcb39..501aca7913d1 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3214,6 +3214,12 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
 	}
     }
 
+  if (TARGET_DMF)
+    {
+      reg_addr[TDOmode].reload_load = CODE_FOR_reload_tdo_load;
+      reg_addr[TDOmode].reload_store = CODE_FOR_reload_tdo_store;
+    }
+
   /* Precalculate HARD_REGNO_NREGS.  */
   for (r = 0; HARD_REGISTER_NUM_P (r); ++r)
     for (m = 0; m < NUM_MACHINE_MODES; ++m)