[gcc r17-2403] middle-end: use tree mode for masked cbranch operand [PR126221]

Hu via Gcc-cvs <[email protected]>
Newsgroups gmane.comp.gcc.cvs
Message-ID <[email protected]>
https://gcc.gnu.org/g:170fcbba4c97ea40750cc5c2fd0eb787311085f0

commit r17-2403-g170fcbba4c97ea40750cc5c2fd0eb787311085f0
Author: Hu, Lin1 <[email protected]>
Date:   Mon Jul 13 14:51:22 2026 +0800

    middle-end: use tree mode for masked cbranch operand [PR126221]
    
    emit_cmp_and_jump_insns used GET_MODE (expand_normal (masked_op)) to select the
    mask mode.  For vector boolean constants that expand to CONST_INT, this produces
    VOIDmode and triggers the assert mode != VOID_mode in maybe_legitimize_operand.
    
    Use TYPE_MODE (TREE_TYPE (masked_op)), so the constant can be materialized in
    the right mask mode.
    
    gcc/ChangeLog:
    
            PR middle-end/126203
            PR middle-end/126221
            PR middle-end/126232
            * optabs.cc (emit_cmp_and_jump_insns): Take the masked_op mode
            from TREE_TYPE (masked_op).
    
    gcc/testsuite/ChangeLog:
    
            PR middle-end/126203
            PR middle-end/126221
            PR middle-end/126232
            * gcc.target/i386/pr126221-1.c: New test.
            * gcc.target/i386/pr126221-2.c: Ditto.
            * gfortran.dg/pr126221.f90: Ditto.

Diff:
---
 gcc/optabs.cc                              |  2 +-
 gcc/testsuite/gcc.target/i386/pr126221-1.c | 14 ++++++++++++++
 gcc/testsuite/gcc.target/i386/pr126221-2.c | 18 ++++++++++++++++++
 gcc/testsuite/gfortran.dg/pr126221.f90     |  9 +++++++++
 4 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/gcc/optabs.cc b/gcc/optabs.cc
index 57fc9d3306ea..012c0e9736ec 100644
--- a/gcc/optabs.cc
+++ b/gcc/optabs.cc
@@ -5097,8 +5097,8 @@ emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
 	      create_input_operand (&ops[offset + 1], op1c, mode2);
 	      if (masked_op)
 		{
+		  auto mask_mode = TYPE_MODE (TREE_TYPE (masked_op));
 		  rtx mask_op = expand_normal (masked_op);
-		  auto mask_mode = GET_MODE (mask_op);
 		  create_input_operand (&ops[0], mask_op, mask_mode);
 		}
 	      else if (len_op)
diff --git a/gcc/testsuite/gcc.target/i386/pr126221-1.c b/gcc/testsuite/gcc.target/i386/pr126221-1.c
new file mode 100644
index 000000000000..c7b8680ece87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126221-1.c
@@ -0,0 +1,14 @@
+/* PR middle-end/126221 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=x86-64-v4" } */
+
+int a[5];
+int
+foo (int t)
+{
+  for (int c = 0; c < 5; c++)
+    if (a[c] && c == 0)
+      return 0;
+  return t;
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/pr126221-2.c b/gcc/testsuite/gcc.target/i386/pr126221-2.c
new file mode 100644
index 000000000000..de3c35f3fec1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126221-2.c
@@ -0,0 +1,18 @@
+/* PR middle-end/126221 */
+/* { dg-do compile { target bitint } } */
+/* { dg-options "-O3 -fvect-cost-model=unlimited --param=vect-partial-vector-usage=2 -mavx10.1" } */
+
+#if __BITINT_MAXWIDTH__ >= 10986
+_BitInt(10986) b;
+char c;
+
+void
+foo (void)
+{
+  int t;
+  if (__builtin_mul_overflow (0xffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffff0000ffffuwb, c, &t))
+    t = 1;
+  b = t;
+}
+
+#endif
diff --git a/gcc/testsuite/gfortran.dg/pr126221.f90 b/gcc/testsuite/gfortran.dg/pr126221.f90
new file mode 100644
index 000000000000..addf76dc3a1e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr126221.f90
@@ -0,0 +1,9 @@
+! { dg-do compile }
+! { dg-options "-O3" }
+! { dg-additional-options "-mavx10.1 --param=vect-partial-vector-usage=2" { target { i?86-*-* x86_64-*-* } } }
+!
+! PR middle-end/126221
+
+integer A(5,5)
+if (any (A(:,5) /= [9, 9, 9, 9, 5])) STOP
+end
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