[gcc r17-2411] regrename: Handle MEM segments

Andrew Stubbs via Gcc-cvs <[email protected]>
Newsgroups gmane.comp.gcc.cvs
Message-ID <[email protected]>
https://gcc.gnu.org/g:cfc8ba7fa91eb7bf12fb7cd01542ddee2c337fb0

commit r17-2411-gcfc8ba7fa91eb7bf12fb7cd01542ddee2c337fb0
Author: Andrew Stubbs <[email protected]>
Date:   Wed Jul 1 14:36:55 2026 +0000

    regrename: Handle MEM segments
    
    This patch fixes the register rename pass to allow for MEM that have "segment"
    elements in the address.
    
    rtl.h and rtanal.h allow MEM addresses to have the format "segment + base +
    offset", where "segment" is an arbitrary UNSPEC.  Without the patch, regrename
    misidentifies the base and can break 64-bit addresses, on targets with 32-bit
    registers, by placing the high-part in a non-contiguous register.
    
    gcc/ChangeLog:
    
            * regrename.cc (scan_rtx_address): Recurse for segment UNSPECs.

Diff:
---
 gcc/regrename.cc | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/gcc/regrename.cc b/gcc/regrename.cc
index 5b625cd27dff..07c3659f8a8c 100644
--- a/gcc/regrename.cc
+++ b/gcc/regrename.cc
@@ -1341,6 +1341,12 @@ scan_rtx_address (rtx_insn *insn, rtx *loc, enum reg_class cl,
 	rtx *locB = NULL;
 	enum rtx_code index_code = SCRATCH;
 
+	if (GET_CODE (op0) == UNSPEC)
+	  {
+	    /* We have a "segment" unspec; skip it.  */
+	    return scan_rtx_address (insn, &XEXP (x, 1), cl, action, mode, as);
+	  }
+
 	if (GET_CODE (op0) == SUBREG)
 	  {
 	    op0 = SUBREG_REG (op0);
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