[gcc r17-2531] Daily bump.

GCC Administrator via Gcc-cvs <[email protected]>
Newsgroups gmane.comp.gcc.cvs
Message-ID <[email protected]>
https://gcc.gnu.org/g:6936adcf593b104e67c0004864a938c2379926c6

commit r17-2531-g6936adcf593b104e67c0004864a938c2379926c6
Author: GCC Administrator <[email protected]>
Date:   Mon Jul 20 00:16:33 2026 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 84 +++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/fortran/ChangeLog   |  8 +++++
 gcc/testsuite/ChangeLog | 55 ++++++++++++++++++++++++++++++++
 libgfortran/ChangeLog   |  7 +++++
 5 files changed, 155 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c77555b57127..6fad13ae3792 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,87 @@
+2026-07-19  Philipp Tomsich  <[email protected]>
+
+	PR tree-optimization/126291
+	* match.pd ((trunc)abs (extend x) -> abs (x)): Use
+	element_precision. Require target ABS support for the
+	vector case.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (svrsw60t59b): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (ssqosid): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (ssctr): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (smctr): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (smcdeleg): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (ssccfg): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (ziccamoc): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* config/riscv/riscv-ext.def (ziccid): Add new extension.
+	* config/riscv/riscv-ext.opt: Ditto.
+	* doc/riscv-ext.texi: Ditto.
+
+2026-07-19  Jeff Law  <[email protected]>
+
+	PR target/125731
+	* ifcvt.cc (noce_cond_zero_binary_op_supported): Move earlier.
+	(noce_try_shifted_store_flag): New function.
+	(noce_process_if_block): Use it.
+
+2026-07-19  Andrew MacLeod  <[email protected]>
+
+	PR tree-optimization/126222
+	* value-range-storage.cc (prange_storage::equal_p): Comment change.
+	* value-range.h (prange::pt_equal_p): Use vrp_operand_equal_p.
+
+2026-07-19  Andrew MacLeod  <[email protected]>
+
+	PR tree-optimization/126212
+	* value-relation.cc (dom_oracle::set_one_relation): Start with
+	first dominator in the dominator search.
+	(dom_oracle::recomputed_relation): New.
+	(dom_oracle::find_relation_dom): query recomputed_relation.
+	* value-relation.h (dom_oracle::recomputed_relation): New prototype.
+
+2026-07-19  Andrew MacLeod  <[email protected]>
+
+	PR tree-optimization/126212
+	* range-op.cc (operator_logical_and::op1_range): Add case for
+	[0, 0] = op1 & [1, 1]
+	(operator_logical_or::op1_range): Add case for [1, 1] = op1 | [0, 0]
+
 2026-07-18  Luke Zhuang  <[email protected]>
 	    Kito Cheng  <[email protected]>
 
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 420ab44d5e57..565cf268bc8b 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20260719
+20260720
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index e08ab5129bbc..1434125da946 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,11 @@
+2026-07-19  Thomas Koenig  <[email protected]>
+
+	* dump-parse-tree.cc (show_code_node): Show typespec for
+	ALLOCATE if present.
+	* frontend-passes.cc (gfc_expr_walker): Walk the character
+	typespec length for array expressions.
+	(gfc_code_walker): Walk the typespec for ALLOCATE if present.
+
 2026-07-18  Thomas Koenig  <[email protected]>
 
 	PR fortran/126058
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index eb3102bbc5d5..c9734644936e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,58 @@
+2026-07-19  Philipp Tomsich  <[email protected]>
+
+	PR tree-optimization/126291
+	* gcc.target/aarch64/pr126291.c: New test.
+
+2026-07-19  Jerry DeLisle  <[email protected]>
+
+	PR libfortran/93727
+	* gfortran.dg/EXformat_5.F90: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/svrsw60t59b-version.c: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/ssqosid-version.c: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/ssctr-version.c: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/smctr-version.c: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/smcdeleg-version.c: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/ssccfg-version.c: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/ziccamoc-version.c: New test.
+
+2026-07-19  Jiawei  <[email protected]>
+
+	* gcc.target/riscv/zi-ext.c: Add ziccid to arch test.
+	* gcc.target/riscv/ziccid-version.c: New test.
+	* gcc.target/riscv/ziccid.c: New test.
+
+2026-07-19  Jeff Law  <[email protected]>
+
+	PR target/125731
+	* gcc.target/riscv/pr125731-1.c: New test.
+	* gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: Drop shift count test.
+
+2026-07-19  Andrew MacLeod  <[email protected]>
+
+	PR tree-optimization/126212
+	* gcc.dg/pr126212.c: New.
+
 2026-07-18  Luke Zhuang  <[email protected]>
 	    Kito Cheng  <[email protected]>
 
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index ada5996a1944..5c7abd43af75 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,10 @@
+2026-07-19  Jerry DeLisle  <[email protected]>
+
+	PR libfortran/93727
+	* io/list_read.c (parse_real): Parse the possible hexadecimal
+	float formatted and then allow the convert_real function to
+	validate the result.
+
 2026-07-15  John David Anglin  <[email protected]>
 
 	* caf/shmem/shared_memory.c (shared_memory_set_env): Don't
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