[gcc r17-2671] rs6000: Builtins for MMA+ float16 outer product instructions

Surya Kumari Jangala via Gcc-cvs <[email protected]>
Newsgroups gmane.comp.gcc.cvs
Message-ID <[email protected]> 
https://gcc.gnu.org/g:fa857474a59842fce780b4e5246189e36ef5e167

commit r17-2671-gfa857474a59842fce780b4e5246189e36ef5e167
Author: Surya Kumari Jangala <[email protected]>
Date:   Thu Jul 23 08:53:15 2026 -0500

    rs6000: Builtins for MMA+ float16 outer product instructions
    
    This patch adds builtins for the Matrix Multiply Assist Plus (MMA+)
    float16 GER instructions. These instructions may or may not be
    supported in a future Power processor. Specifically, builtins have been
    added for the following instructions:
    
    Float16 GER operations:
      - dmxvf16gerx2 and its variants (pp, pn, np, nn)
      - pmdmxvf16gerx2 and its variants (pp, pn, np, nn)
    
    Note, the names of the builtins may change in the future.
    
    2026-06-25  Surya Kumari Jangala  <[email protected]>
    
    gcc:
            * config/rs6000/mma.md (UNSPEC_DMF_DMXVF16GERX2): New UNSPEC entry.
            (UNSPEC_DMF_DMXVF16GERX2PP): Likewise.
            (UNSPEC_DMF_DMXVF16GERX2PN): Likewise.
            (UNSPEC_DMF_DMXVF16GERX2NP): Likewise.
            (UNSPEC_DMF_DMXVF16GERX2NN): Likewise.
            (UNSPEC_DMF_PMDMXVF16GERX2): Likewise.
            (UNSPEC_DMF_PMDMXVF16GERX2PP): Likewise.
            (UNSPEC_DMF_PMDMXVF16GERX2PN): Likewise.
            (UNSPEC_DMF_PMDMXVF16GERX2NP): Likewise.
            (UNSPEC_DMF_PMDMXVF16GERX2NN): Likewise.
            (DMF_PV): Add UNSPEC_DMF_DMXVF16GERX2.
            (DMF_DPV): Add f16 variants.
            (DMF_PVI8I4I2): Add UNSPEC_DMF_PMDMXVF16GERX2.
            (DMF_DPVI8I4I2): Add f16 prefixed variants.
            (pv): Add dmxvf16gerx2 attribute.
            (dpv): Add f16 attributes.
            (pvi8i4i2): Add pmdmxvf16gerx2 attribute.
            (dpvi8i4i2): Add f16 prefixed attributes.
            * config/rs6000/rs6000-builtins.def (__builtin_mma_dmxvf16gerx2): New
            builtin.
            (__builtin_mma_dmxvf16gerx2pp): Likewise.
            (__builtin_mma_dmxvf16gerx2pn): Likewise.
            (__builtin_mma_dmxvf16gerx2np): Likewise.
            (__builtin_mma_dmxvf16gerx2nn): Likewise.
            (__builtin_mma_pmdmxvf16gerx2): Likewise.
            (__builtin_mma_pmdmxvf16gerx2pp): Likewise.
            (__builtin_mma_pmdmxvf16gerx2pn): Likewise.
            (__builtin_mma_pmdmxvf16gerx2np): Likewise.
            (__builtin_mma_pmdmxvf16gerx2nn): Likewise.
            (__builtin_mma_dmxvf16gerx2_internal): New internal builtin.
            (__builtin_mma_dmxvf16gerx2pp_internal): Likewise.
            (__builtin_mma_dmxvf16gerx2pn_internal): Likewise.
            (__builtin_mma_dmxvf16gerx2np_internal): Likewise.
            (__builtin_mma_dmxvf16gerx2nn_internal): Likewise.
            (__builtin_mma_pmdmxvf16gerx2_internal): Likewise.
            (__builtin_mma_pmdmxvf16gerx2pp_internal): Likewise.
            (__builtin_mma_pmdmxvf16gerx2pn_internal): Likewise.
            (__builtin_mma_pmdmxvf16gerx2np_internal): Likewise.
            (__builtin_mma_pmdmxvf16gerx2nn_internal): Likewise.
            * doc/extend.texi (PowerPC Matrix-Multiply Assist Built-in Functions):
            Document new MMA+ builtins for f16 operations.
    
    gcc/testsuite:
            * gcc.target/powerpc/dmf-builtin-2.c: New test.

Diff:
---
 gcc/config/rs6000/mma.md                         |  48 +++++--
 gcc/config/rs6000/rs6000-builtins.def            |  70 ++++++++++
 gcc/doc/extend.texi                              |  12 ++
 gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c | 170 +++++++++++++++++++++++
 4 files changed, 291 insertions(+), 9 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 2b052dbe785a..f5085cd967e6 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -114,6 +114,16 @@
    UNSPEC_DMF_PMDMXVBF16GERX2PN
    UNSPEC_DMF_PMDMXVBF16GERX2NP
    UNSPEC_DMF_PMDMXVBF16GERX2NN
+   UNSPEC_DMF_DMXVF16GERX2
+   UNSPEC_DMF_DMXVF16GERX2PP
+   UNSPEC_DMF_DMXVF16GERX2PN
+   UNSPEC_DMF_DMXVF16GERX2NP
+   UNSPEC_DMF_DMXVF16GERX2NN
+   UNSPEC_DMF_PMDMXVF16GERX2
+   UNSPEC_DMF_PMDMXVF16GERX2PP
+   UNSPEC_DMF_PMDMXVF16GERX2PN
+   UNSPEC_DMF_PMDMXVF16GERX2NP
+   UNSPEC_DMF_PMDMXVF16GERX2NN
   ])
 
 (define_c_enum "unspecv"
@@ -158,7 +168,8 @@
 
 ; DMF instructions with 1 vector pair and 1 vector arguments
 (define_int_iterator DMF_PV		[UNSPEC_DMF_DMXVI8GERX4
-					 UNSPEC_DMF_DMXVBF16GERX2])
+					 UNSPEC_DMF_DMXVBF16GERX2
+					 UNSPEC_DMF_DMXVF16GERX2])
 
 ;; MMA instructions with 1 accumulator, 1 vector pair and 1 vector arguments
 (define_int_iterator MMA_APV		[UNSPEC_MMA_XVF64GERPP
@@ -172,7 +183,11 @@
 					 UNSPEC_DMF_DMXVBF16GERX2PP
 					 UNSPEC_DMF_DMXVBF16GERX2PN
 					 UNSPEC_DMF_DMXVBF16GERX2NP
-					 UNSPEC_DMF_DMXVBF16GERX2NN])
+					 UNSPEC_DMF_DMXVBF16GERX2NN
+					 UNSPEC_DMF_DMXVF16GERX2PP
+					 UNSPEC_DMF_DMXVF16GERX2PN
+					 UNSPEC_DMF_DMXVF16GERX2NP
+					 UNSPEC_DMF_DMXVF16GERX2NN])
 
 ;; MMA instructions with 2 vector, 2 4-bit and 1 8-bit arguments
 (define_int_iterator MMA_VVI4I4I8	[UNSPEC_MMA_PMXVI4GER8])
@@ -234,14 +249,19 @@
 
 ;; DMF instructions with 1 vector pair, 1 vector, 1 8-bit, 1 4-bit
 ;; and 1 2-bit arguments
-(define_int_iterator DMF_PVI8I4I2      [UNSPEC_DMF_PMDMXVBF16GERX2])
+(define_int_iterator DMF_PVI8I4I2      [UNSPEC_DMF_PMDMXVBF16GERX2
+					 UNSPEC_DMF_PMDMXVF16GERX2])
 
 ;; DMF instructions with 1dmr, 1 vector pair, 1 vector, 1 8-bit,
 ;; 1 4-bit and 1 2-bit arguments
 (define_int_iterator DMF_DPVI8I4I2     [UNSPEC_DMF_PMDMXVBF16GERX2PP
 					UNSPEC_DMF_PMDMXVBF16GERX2PN
 					UNSPEC_DMF_PMDMXVBF16GERX2NP
-					UNSPEC_DMF_PMDMXVBF16GERX2NN])
+					UNSPEC_DMF_PMDMXVBF16GERX2NN
+					UNSPEC_DMF_PMDMXVF16GERX2PP
+					UNSPEC_DMF_PMDMXVF16GERX2PN
+					UNSPEC_DMF_PMDMXVF16GERX2NP
+					UNSPEC_DMF_PMDMXVF16GERX2NN])
 
 (define_int_attr acc		[(UNSPEC_MMA_XXMFACC		"xxmfacc")
 				 (UNSPEC_MMA_XXMTACC		"xxmtacc")])
@@ -274,7 +294,8 @@
 
 (define_int_attr pv		[(UNSPEC_MMA_XVF64GER		"xvf64ger")
 				 (UNSPEC_DMF_DMXVI8GERX4        "dmxvi8gerx4")
-				 (UNSPEC_DMF_DMXVBF16GERX2      "dmxvbf16gerx2")])
+				 (UNSPEC_DMF_DMXVBF16GERX2      "dmxvbf16gerx2")
+				 (UNSPEC_DMF_DMXVF16GERX2	"dmxvf16gerx2")])
 
 (define_int_attr apv		[(UNSPEC_MMA_XVF64GERPP		"xvf64gerpp")
 				 (UNSPEC_MMA_XVF64GERPN		"xvf64gerpn")
@@ -286,7 +307,11 @@
 				 (UNSPEC_DMF_DMXVBF16GERX2PP	"dmxvbf16gerx2pp")
 				 (UNSPEC_DMF_DMXVBF16GERX2PN	"dmxvbf16gerx2pn")
 				 (UNSPEC_DMF_DMXVBF16GERX2NP	"dmxvbf16gerx2np")
-				 (UNSPEC_DMF_DMXVBF16GERX2NN	"dmxvbf16gerx2nn")])
+				 (UNSPEC_DMF_DMXVBF16GERX2NN	"dmxvbf16gerx2nn")
+				 (UNSPEC_DMF_DMXVF16GERX2PP	"dmxvf16gerx2pp")
+				 (UNSPEC_DMF_DMXVF16GERX2PN	"dmxvf16gerx2pn")
+				 (UNSPEC_DMF_DMXVF16GERX2NP	"dmxvf16gerx2np")
+				 (UNSPEC_DMF_DMXVF16GERX2NN	"dmxvf16gerx2nn")])
 
 (define_int_attr vvi4i4i8	[(UNSPEC_MMA_PMXVI4GER8		"pmxvi4ger8")])
 
@@ -332,12 +357,17 @@
 (define_int_attr dpvi8i4i4	[(UNSPEC_DMF_PMDMXVI8GERX4PP    "pmdmxvi8gerx4pp")
 				 (UNSPEC_DMF_PMDMXVI8GERX4SPP   "pmdmxvi8gerx4spp")])
 
-(define_int_attr pvi8i4i2	[(UNSPEC_DMF_PMDMXVBF16GERX2	"pmdmxvbf16gerx2")])
+(define_int_attr pvi8i4i2	[(UNSPEC_DMF_PMDMXVBF16GERX2	"pmdmxvbf16gerx2")
+				 (UNSPEC_DMF_PMDMXVF16GERX2	"pmdmxvf16gerx2")])
 
 (define_int_attr dpvi8i4i2	[(UNSPEC_DMF_PMDMXVBF16GERX2PP "pmdmxvbf16gerx2pp")
 				 (UNSPEC_DMF_PMDMXVBF16GERX2PN  "pmdmxvbf16gerx2pn")
 				 (UNSPEC_DMF_PMDMXVBF16GERX2NP  "pmdmxvbf16gerx2np")
-				 (UNSPEC_DMF_PMDMXVBF16GERX2NN  "pmdmxvbf16gerx2nn")])
+				 (UNSPEC_DMF_PMDMXVBF16GERX2NN  "pmdmxvbf16gerx2nn")
+				 (UNSPEC_DMF_PMDMXVF16GERX2PP	"pmdmxvf16gerx2pp")
+				 (UNSPEC_DMF_PMDMXVF16GERX2PN	"pmdmxvf16gerx2pn")
+				 (UNSPEC_DMF_PMDMXVF16GERX2NP	"pmdmxvf16gerx2np")
+				 (UNSPEC_DMF_PMDMXVF16GERX2NN	"pmdmxvf16gerx2nn")])
 
 ;; Vector pair support.  OOmode can only live in VSRs.
 (define_expand "movoo"
@@ -1039,7 +1069,7 @@
   [(set_attr "type" "dmf")])
 
 (define_insn "dmf_<pv>"
-  [(set (match_operand:TDO 0 "accumulator_operand" "=wD")
+  [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
 	(unspec:TDO [(match_operand:OO 1 "vsx_register_operand" "wa")
 		     (match_operand:V16QI 2 "vsx_register_operand" "wa")]
 		    DMF_PV))]
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 6787b0a9b802..428a01ea2e39 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -4243,3 +4243,73 @@
   dmr1024 __builtin_mma_pmdmxvbf16gerx2nn_internal (dmr1024, v256, vuc, const int<8>, \
                                                 const int<4>, const int<2>);
     PMDMXVBF16GERX2NN_INTERNAL dmf_pmdmxvbf16gerx2nn {dm,pair}
+
+  void __builtin_mma_dmxvf16gerx2 (dmr1024 *, v256, vuc);
+    DMXVF16GERX2 nothing {dm,dmint}
+
+  dmr1024 __builtin_mma_dmxvf16gerx2_internal (v256, vuc);
+    DMXVF16GERX2_INTERNAL dmf_dmxvf16gerx2 {dm}
+
+  void __builtin_mma_dmxvf16gerx2pp (dmr1024 *, v256, vuc);
+    DMXVF16GERX2PP nothing {dm,dmint,dmr}
+
+  dmr1024 __builtin_mma_dmxvf16gerx2pp_internal (dmr1024, v256, vuc);
+    DMXVF16GERX2PP_INTERNAL dmf_dmxvf16gerx2pp {dm}
+
+  void __builtin_mma_dmxvf16gerx2pn (dmr1024 *, v256, vuc);
+    DMXVF16GERX2PN nothing {dm,dmint,dmr}
+
+  dmr1024 __builtin_mma_dmxvf16gerx2pn_internal (dmr1024, v256, vuc);
+    DMXVF16GERX2PN_INTERNAL dmf_dmxvf16gerx2pn {dm}
+
+  void __builtin_mma_dmxvf16gerx2np (dmr1024 *, v256, vuc);
+    DMXVF16GERX2NP nothing {dm,dmint,dmr}
+
+  dmr1024 __builtin_mma_dmxvf16gerx2np_internal (dmr1024, v256, vuc);
+    DMXVF16GERX2NP_INTERNAL dmf_dmxvf16gerx2np {dm}
+
+  void __builtin_mma_dmxvf16gerx2nn (dmr1024 *, v256, vuc);
+    DMXVF16GERX2NN nothing {dm,dmint,dmr}
+
+  dmr1024 __builtin_mma_dmxvf16gerx2nn_internal (dmr1024, v256, vuc);
+    DMXVF16GERX2NN_INTERNAL dmf_dmxvf16gerx2nn {dm}
+
+  void __builtin_mma_pmdmxvf16gerx2 (dmr1024 *, v256, vuc, const int<8>, \
+				    const int<4>, const int<2>);
+    PMDMXVF16GERX2 nothing {dm,pair,dmint}
+
+  dmr1024 __builtin_mma_pmdmxvf16gerx2_internal (v256, vuc, const int<8>, \
+					       const int<4>, const int<2>);
+    PMDMXVF16GERX2_INTERNAL dmf_pmdmxvf16gerx2 {dm,pair}
+
+  void __builtin_mma_pmdmxvf16gerx2pp (dmr1024 *, v256, vuc, const int<8>, \
+				      const int<4>, const int<2>);
+    PMDMXVF16GERX2PP nothing {dm,pair,dmint,dmr}
+
+  dmr1024 __builtin_mma_pmdmxvf16gerx2pp_internal (dmr1024, v256, vuc, const int<8>, \
+						 const int<4>, const int<2>);
+    PMDMXVF16GERX2PP_INTERNAL dmf_pmdmxvf16gerx2pp {dm,pair}
+
+  void __builtin_mma_pmdmxvf16gerx2pn (dmr1024 *, v256, vuc, const int<8>, \
+				      const int<4>, const int<2>);
+    PMDMXVF16GERX2PN nothing {dm,pair,dmint,dmr}
+
+  dmr1024 __builtin_mma_pmdmxvf16gerx2pn_internal (dmr1024, v256, vuc, const int<8>, \
+						 const int<4>, const int<2>);
+    PMDMXVF16GERX2PN_INTERNAL dmf_pmdmxvf16gerx2pn {dm,pair}
+
+  void __builtin_mma_pmdmxvf16gerx2np (dmr1024 *, v256, vuc, const int<8>, \
+				      const int<4>, const int<2>);
+    PMDMXVF16GERX2NP nothing {dm,pair,dmint,dmr}
+
+  dmr1024 __builtin_mma_pmdmxvf16gerx2np_internal (dmr1024, v256, vuc, const int<8>, \
+						 const int<4>, const int<2>);
+    PMDMXVF16GERX2NP_INTERNAL dmf_pmdmxvf16gerx2np {dm,pair}
+
+  void __builtin_mma_pmdmxvf16gerx2nn (dmr1024 *, v256, vuc, const int<8>, \
+				      const int<4>, const int<2>);
+    PMDMXVF16GERX2NN nothing {dm,pair,dmint,dmr}
+
+  dmr1024 __builtin_mma_pmdmxvf16gerx2nn_internal (dmr1024, v256, vuc, const int<8>, \
+						 const int<4>, const int<2>);
+    PMDMXVF16GERX2NN_INTERNAL dmf_pmdmxvf16gerx2nn {dm,pair}
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index c4271a5ff830..16ce7908d91b 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -27501,6 +27501,18 @@ void __builtin_mma_pmdmxvbf16gerx2pp (__dmr1024 *, __vector_pair, vec_t, uint8,
 void __builtin_mma_pmdmxvbf16gerx2pn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
 void __builtin_mma_pmdmxvbf16gerx2np (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
 void __builtin_mma_pmdmxvbf16gerx2nn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+
+void __builtin_mma_dmxvf16gerx2 (__dmr1024 *, __vector_pair, vec_t);
+void __builtin_mma_dmxvf16gerx2pp (__dmr1024 *, __vector_pair, vec_t);
+void __builtin_mma_dmxvf16gerx2pn (__dmr1024 *, __vector_pair, vec_t);
+void __builtin_mma_dmxvf16gerx2np (__dmr1024 *, __vector_pair, vec_t);
+void __builtin_mma_dmxvf16gerx2nn (__dmr1024 *, __vector_pair, vec_t);
+
+void __builtin_mma_pmdmxvf16gerx2 (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+void __builtin_mma_pmdmxvf16gerx2pp (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+void __builtin_mma_pmdmxvf16gerx2pn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+void __builtin_mma_pmdmxvf16gerx2np (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+void __builtin_mma_pmdmxvf16gerx2nn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
 @end smallexample
 
 @node PowerPC Dense Math Facility Built-in Functions
diff --git a/gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c
new file mode 100644
index 000000000000..2074edc7aed9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c
@@ -0,0 +1,170 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_future_compile_ok } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+typedef unsigned char vec_t __attribute__((vector_size(16)));
+
+void
+foo (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_dmsetdmrz (&dmr);
+  __builtin_mma_dmxvf16gerx2 (&dmr, vp, vec);
+  *dst = dmr;
+}
+
+void
+bar (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr = dst[0];;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_dmxvf16gerx2 (&dmr, vp, vec);
+  dst[1] = dmr;
+}
+
+/* { dg-final { scan-assembler-times {\mdmxvf16gerx2\M} 2 } } */
+
+void
+foo_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_dmsetdmrz (&dmr);
+  __builtin_mma_dmxvf16gerx2nn (&dmr, vp, vec);
+  *dst = dmr;
+}
+
+void
+bar_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr = dst[0];;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_dmxvf16gerx2nn (&dmr, vp, vec);
+  dst[1] = dmr;
+}
+
+/* { dg-final { scan-assembler-times {\mdmxvf16gerx2nn\M} 2 } } */
+
+void
+foo_2 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_dmsetdmrz (&dmr);
+  __builtin_mma_dmxvf16gerx2np (&dmr, vp, vec);
+  *dst = dmr;
+}
+
+void
+bar_2 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr = dst[0];;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_dmxvf16gerx2np (&dmr, vp, vec);
+  dst[1] = dmr;
+}
+
+/* { dg-final { scan-assembler-times {\mdmxvf16gerx2np\M} 2 } } */
+
+void
+foo_3 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_dmsetdmrz (&dmr);
+  __builtin_mma_dmxvf16gerx2pn (&dmr, vp, vec);
+  *dst = dmr;
+}
+
+void
+bar_3 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr = dst[0];;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_dmxvf16gerx2pn (&dmr, vp, vec);
+  dst[1] = dmr;
+}
+
+/* { dg-final { scan-assembler-times {\mdmxvf16gerx2pn\M} 2 } } */
+
+void
+foo_4 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_dmsetdmrz (&dmr);
+  __builtin_mma_dmxvf16gerx2pp (&dmr, vp, vec);
+  *dst = dmr;
+}
+
+void
+bar_4 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __dmr1024 dmr = dst[0];;
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_dmxvf16gerx2pp (&dmr, vp, vec);
+  dst[1] = dmr;
+}
+
+/* { dg-final { scan-assembler-times {\mdmxvf16gerx2pp\M} 2 } } */
+
+void
+foo_5 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_pmdmxvf16gerx2 (dst, vp, vec, 255, 15, 2);
+}
+
+/* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2\M} 1 } } */
+
+void
+foo_6 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_pmdmxvf16gerx2nn (dst, vp, vec, 255, 15, 2);
+}
+
+/* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2nn\M} 1 } } */
+
+void
+foo_7 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_pmdmxvf16gerx2np (dst, vp, vec, 255, 15, 2);
+}
+
+/* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2np\M} 1 } } */
+
+void
+foo_8 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_pmdmxvf16gerx2pn (dst, vp, vec, 255, 15, 2);
+}
+
+/* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2pn\M} 1 } } */
+
+void
+foo_9 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+{
+  __vector_pair vp = *vpp;
+  vec_t vec = *src;
+  __builtin_mma_pmdmxvf16gerx2pp (dst, vp, vec, 255, 15, 2);
+}
+
+/* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2pp\M} 1 } } */
lmpx.com only provides a reader for public news (NNTP) servers. It is not affiliated with the servers or forums shown here and is not responsible for the content of articles, which is written by their respective authors.