[gcc/meissner/heads/work252-orig] (13 commits) Merge commit 'refs/users/meissner/heads/work252-orig' of gi
Michael Meissner via Gcc-cvs <[email protected]>
| Newsgroups | gmane.comp.gcc.cvs |
|---|---|
| Message-ID | <[email protected]> |
The branch 'meissner/heads/work252-orig' was updated to point to:
f99b5c15e8c7... Merge commit 'refs/users/meissner/heads/work252-orig' of gi
It previously pointed to:
45a4bcbb7da8... Merge commit 'refs/users/meissner/heads/work252-orig' of gi
Diff:
Summary of changes (added commits):
-----------------------------------
f99b5c1... Merge commit 'refs/users/meissner/heads/work252-orig' of gi
b87c515... Add REVISION.
b5e6f5d... middle-end: Replace INTEGER_CST + expand_normal with tree_t (*)
5fbbf2d... gcn: mkoffload - pass -L<dir> on to the amdgcn-amdhsa linke (*)
ad8686f... AArch64: Update Neoverse V2 cost model for SVE structure lo (*)
d20adca... target/126328 - [x86] insn_cost of *sse3_h{add,sub}v2df3[_l (*)
a3a3e4f... Remove shift vectorization check from vect_build_slp_tree_1 (*)
04e8cc4... Set INSN_CODE to recognized insn before calling insn_cost i (*)
d96ac42... testsuite: Split rs6000 mma tests into power10 and future (*)
380bd5c... OpenMP/C++: Handle OMP_CLAUSE_DEVICE_TYPE in pt.cc (*)
10cba11... Mention the forge on unofficial mirrors (*)
b13e5bf... x86 SSE: Use insertps to zero V4SI/V4SF elements in a singl (*)
33402b1... ifcvt: drop redundant reversibility pre-checks in store-fla (*)
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