[gcc r17-2691] Daily bump.

GCC Administrator via Gcc-cvs <[email protected]>
Newsgroups gmane.comp.gcc.cvs
Message-ID <[email protected]>
https://gcc.gnu.org/g:85b1d6e844fca220693a8e9fa105b74bd0187d3c

commit r17-2691-g85b1d6e844fca220693a8e9fa105b74bd0187d3c
Author: GCC Administrator <[email protected]>
Date:   Sat Jul 25 00:16:32 2026 +0000

    Daily bump.

Diff:
---
 ChangeLog               |  6 ++++
 gcc/ChangeLog           | 86 +++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/cp/ChangeLog        |  5 +++
 gcc/testsuite/ChangeLog | 72 +++++++++++++++++++++++++++++++++++++++++
 libgfortran/ChangeLog   | 27 ++++++++++++++++
 6 files changed, 197 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index f600881a1d7a..f4f93b8d9846 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2026-07-24  Claudio Bantaloukas  <[email protected]>
+
+	* .github/CONTRIBUTING.md: Update text.
+	* .github/PULL_REQUEST_TEMPLATE.md: Link
+	to CONTRIBUTING.md directly.
+
 2026-07-22  Andrea Pinski  <[email protected]>
 
 	* MAINTAINERS.yml: Update my name.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f3cf3e230bd2..d60617f57dd2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,89 @@
+2026-07-24  Jeff Law  <[email protected]>
+
+	* print-rtl.cc (print_exp): Avoid -Wempty-body warning.
+
+2026-07-24  H.J. Lu  <[email protected]>
+	    Uros Bizjak  <[email protected]>
+
+	PR target/126320
+	* config/i386/i386.cc (ix86_spill_register_argument_p): New
+	function.
+	(ix86_argument_passed_on_stack_p): Add a pattern argument.  Call
+	ix86_spill_register_argument_p to check spill of register argument
+	by callee.
+	(ix86_update_stack_alignment): Pass pat to
+	ix86_argument_passed_on_stack_p.
+
+2026-07-24  Kael Andrew Alonzo Franco  <[email protected]>
+
+	PR middle-end/126363
+	* builtins.cc (fold_builtin_atomic_always_lock_free): Replace
+	INTEGER_CST + expand_normal with tree_to_uwhi.
+
+2026-07-24  Tobias Burnus  <[email protected]>
+
+	* config/gcn/mkoffload.cc (main): Pass -L<dir> on to the
+	device compiler.
+
+2026-07-24  Pengfei Li  <[email protected]>
+
+	* config/aarch64/tuning_models/neoversev2.h: Update the costs
+	of SVE structure loads and stores.
+
+2026-07-24  Richard Biener  <[email protected]>
+
+	PR target/126328
+	PR target/126383
+	* config/i386/i386.md (cost_special): New attribute.
+	* config/i386/sse.md (avx_h<insn>v4df3): Add cost_special
+	attribute with value haddsub.
+	(*sse3_haddv2df3): Likewise.
+	(sse3_hsubv2df3): Likewise.
+	(*sse3_haddv2df3_low): Likewise.
+	(*sse3_hsubv2df3_low): Likewise.
+	(avx_h<insn>v8sf3): Likewise.
+	(sse3_h<insn>v4sf3): Likewise.
+	* config/i386/i386.cc (ix86_insn_cost): Cost insns with
+	the cost_special attribute value of haddsub like an add.
+
+2026-07-24  Richard Biener  <[email protected]>
+
+	* tree-vect-slp.cc (vect_build_slp_tree_1): Remove failure
+	on unvectorizable shifts.
+
+2026-07-24  Richard Biener  <[email protected]>
+
+	PR target/126328
+	* combine.cc (combine_validate_cost): New arguments for
+	the insn codes.  Set INSN_CODE to recognized values
+	before calling insn_cost.
+	(try_combine): Adjust.
+
+2026-07-24  Roger Sayle  <[email protected]>
+	    Hongtao Liu  <[email protected]>
+
+	* config/i386/i386-expand.cc (ix86_expand_vec_set_builtin): Don't
+	force op1 to a register when it is CONST0_RTX (mode1).
+	(ix86_expand_vector_set_var): For now, force VAL to a register.
+	(ix86_expand_vector_set): If val is CONST0_RTX, expand using
+	the new sse4_1_insertps_v4s[if]_zero patterns on TARGET_SSE4_1.
+	Otherwise, force val to a register (restoring previous behaviour).
+	* config/i386/sse.md (sse4_1_insertps_<mode>_zero): New insn
+	using vec_merge to select which elements to clear/preserve.
+	(vec_set<mode>): Tweak operand 1 to allow both REGs and CONST0_RTX.
+
+2026-07-24  Philipp Tomsich  <[email protected]>
+
+	* ifcvt.cc (noce_emit_store_flag): Document that a NULL_RTX
+	return signals an unreversible condition.
+	(noce_try_store_flag): Drop redundant noce_reversed_cond_code
+	pre-check.
+	(noce_try_shifted_store_flag): Likewise.
+	(noce_try_store_flag_constants): Drop redundant can_reverse
+	guards on the reversed 2^n and -1 cases.
+	(noce_try_store_flag_mask): Set reversep unconditionally; the
+	store-flag emission now handles an unreversible condition.
+
 2026-07-23  John David Anglin  <[email protected]>
 
 	* crc-verification.cc (sb_match): Use HOST_SIZE_T_PRINT_UNSIGNED
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 1713b2449878..3f02e008f437 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20260724
+20260725
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 33eefc693e74..1e9e39e74348 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,8 @@
+2026-07-24  Tobias Burnus  <[email protected]>
+
+	* pt.cc (tsubst_omp_clauses): Add OMP_CLAUSE_DEVICE_TYPE
+	to switch statement.
+
 2026-07-23  Marek Polacek  <[email protected]>
 
 	PR c++/112908
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a095c8d00d37..552dadaa5d7c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,75 @@
+2026-07-24  Andrea Pinski  <[email protected]>
+
+	* gcc.target/aarch64/bitint-args.c (f19): Fix
+	expected form of sbfx to use the w form.
+
+2026-07-24  H.J. Lu  <[email protected]>
+	    Uros Bizjak  <[email protected]>
+
+	PR target/126320
+	* gcc.target/i386/pr126320.c: New test.
+
+2026-07-24  Pengfei Li  <[email protected]>
+
+	* gcc.target/aarch64/sve/cost_model_20.c: New test.
+
+2026-07-24  Avinash Jayakar  <[email protected]>
+
+	* gcc.target/powerpc/mma-builtin-1.c: Move to...
+	* gcc.target/powerpc/mma-builtin-1.h: ...here.
+	* gcc.target/powerpc/mma-builtin-10-pair.c: Move to...
+	* gcc.target/powerpc/mma-builtin-10-pair.h: ...here.
+	* gcc.target/powerpc/mma-builtin-2.c: Move to...
+	* gcc.target/powerpc/mma-builtin-2.h: ...here.
+	* gcc.target/powerpc/mma-builtin-3.c: Move to...
+	* gcc.target/powerpc/mma-builtin-3.nodmf.c: ...here.
+	* gcc.target/powerpc/mma-builtin-4.c: Move to...
+	* gcc.target/powerpc/mma-builtin-4.h: ...here.
+	* gcc.target/powerpc/mma-builtin-5.c: Move to...
+	* gcc.target/powerpc/mma-builtin-5.h: ...here.
+	* gcc.target/powerpc/mma-builtin-6.c: Move to...
+	* gcc.target/powerpc/mma-builtin-6.nodmf.c: ...here.
+	* gcc.target/powerpc/mma-builtin-7.c: Move to...
+	* gcc.target/powerpc/mma-builtin-7.h: ...here.
+	* gcc.target/powerpc/mma-builtin-8.c: Move to...
+	* gcc.target/powerpc/mma-builtin-8.h: ...here.
+	* gcc.target/powerpc/mma-builtin-9.c: Move to...
+	* gcc.target/powerpc/mma-builtin-9.h: ...here.
+	* gcc.target/powerpc/mma-builtin-10-quad.c: Removed.
+	* gcc.target/powerpc/mma-builtin-1.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-1.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-10-pair.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-10-pair.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-10-quad.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-10-quad.h: New test.
+	* gcc.target/powerpc/mma-builtin-10-quad.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-2.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-2.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-3.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-3.h: New test.
+	* gcc.target/powerpc/mma-builtin-4.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-4.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-5.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-5.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-6.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-6.h: New test.
+	* gcc.target/powerpc/mma-builtin-7.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-7.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-8.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-8.nodmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-9.dmf.c: New test.
+	* gcc.target/powerpc/mma-builtin-9.nodmf.c: New test.
+
+2026-07-24  Tobias Burnus  <[email protected]>
+
+	* g++.dg/gomp/target-device-type.C: New test.
+
+2026-07-24  Roger Sayle  <[email protected]>
+	    Hongtao Liu  <[email protected]>
+
+	* gcc.target/i386/sse4_1-insertps-6.c: New test case.
+	* gcc.target/i386/sse4_1-insertps-7.c: Likewise.
+
 2026-07-23  Torbjörn SVENSSON  <[email protected]>
 
 	PR testsuite/118407
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index 5c7abd43af75..30102eb931d1 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,30 @@
+2026-07-24  John David Anglin  <[email protected]>
+
+	PR libfortran/126305
+	* c99_protos.h (acosl, acoshl, asinl, asinhl,atan2l, atanl,
+	atanhl, ceill, cosl, coshl, expl, hypotl, logl, sinl, sinhl,
+	sqrtl, tanl, tanhl, truncl, nextafterl, powl, erfl, erfcl):
+	Add declarations.
+	* configure.ac (powl, erfl): Add GCC_CHECK_MATH_FUNCs.
+	* configure: Regenerate.
+	* config.h.in: Regenerate.
+	* intrinsics/c99_functions.c: Include math_imp.h.  Move code
+	to manipulate the floating-point type to math_imp.h.
+	(erfl, erfcl, acosl, acoshl, asinl, asinhl, atan2l, atanl,
+	atanhl, ceill, cosl, coshl, expl, floorl, fmodl, hypotl,
+	logl, sinl, sinhl, sqrtl, tanl, tanhl, truncl, nextafterl,
+	powl, log10l): Implement.
+	(frexpl): Move code to intrinsics/frexpl_16.c.
+	(scalbnl): Move code to intrinsics/scalbnl_16.c.
+	* intrinsics/ceill_16.c: New.
+	* intrinsics/floorl_16.c: New.
+	* intrinsics/frexpl_16.c: New.
+	* intrinsics/math_imp.h: New.
+	* intrinsics/nextafterl_16.c: New.
+	* intrinsics/scalbnl_16.c: New.
+	* intrinsics/truncl_16.c: New.
+	* libgfortran.h (USE_LIBQUADLIB): Define on hppa-hpux.
+
 2026-07-19  Jerry DeLisle  <[email protected]>
 
 	PR libfortran/93727
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