[gcc r16-9414] testsuite: arm: require fp16 alternative hw for tests

https://gcc.gnu.org/g:4789a6600f4d915e5d75a4805b68ea1a286af304

commit r16-9414-g4789a6600f4d915e5d75a4805b68ea1a286af304
Author: Torbjörn SVENSSON <[email protected]>
Date:   Sat Jul 25 20:42:10 2026 +0200

    testsuite: arm: require fp16 alternative hw for tests
    
    Currently, it's assumed that arm_fp16_alternative_ok is enough to run
    the tests, but arm_fp16_alternative_ok allows multilib override.  While
    the test might link without trouble, execution will likely fail.
    Add arm_fp16_alternative_hw to explicitly test that target can execute
    fp16 instructions in alternative form.
    
    Below tests are known to fail for
    thumb/arch=armv7e-m+fp/cpu=cortex-m4/float-abi=hard/fpu=auto among other
    targets.
    
    gcc/ChangeLog:
    
            * doc/sourcebuild.texi (arm_fp16_alternative_hw): Document.
            (arm_neon_fp16_hw): Add reference to arm_neon_fp16_ok.
    
    gcc/testsuite/ChangeLog:
    
            * g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Require effective target
            arm_fp16_alternative_hw instead of arm_fp16_alternative_ok.
            * g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise.
            * gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise.
            * gcc.dg/torture/arm-fp16-ops-3.c: Likewise.
            * gcc.dg/torture/arm-fp16-ops-4.c: Likewise.
            * lib/target-supports.exp (arm_fp16_alternative_hw): New proc.
    
    Signed-off-by: Torbjörn SVENSSON <[email protected]>
    (cherry picked from commit 450658596be7b45d4682f4e98dafd211ffcfc40d)

Diff:
---
 gcc/doc/sourcebuild.texi                           |  7 ++++++-
 gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C |  2 +-
 gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C |  2 +-
 .../gcc.dg/torture/arm-fp16-int-convert-alt.c      |  2 +-
 gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c      |  2 +-
 gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c      |  2 +-
 gcc/testsuite/lib/target-supports.exp              | 23 ++++++++++++++++++++++
 7 files changed, 34 insertions(+), 6 deletions(-)

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 069fd3892a7d..474132962ba5 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2098,12 +2098,17 @@ options, including @code{-mfp16-format=ieee} if necessary to obtain the
 
 @item arm_neon_fp16_hw
 Test system supports executing Neon half-precision float instructions.
-(Implies previous.)
+(Implies @code(arm_neon_fp16_ok).)
 
 @item arm_fp16_alternative_ok
 ARM target supports the ARM FP16 alternative format.  Some multilibs
 may be incompatible with the options needed.
 
+@item arm_fp16_alternative_hw
+Test system supports executing VFP half-precision floating-point
+instructions in the ARM FP16 alternative format.  (Implies
+@code(arm_fp16_alternative_ok).)
+
 @item arm_fp16_none_ok
 ARM target supports specifying none as the ARM FP16 format.
 
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
index 5eceb3074dfd..839da720ad54 100644
--- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
@@ -1,6 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
-/* { dg-require-effective-target arm_fp16_alternative_ok } */
+/* { dg-require-effective-target arm_fp16_alternative_hw } */
 /* { dg-add-options arm_fp16_alternative } */
 
 #include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
index d86019f14699..ec22e2534108 100644
--- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
@@ -1,6 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
-/* { dg-require-effective-target arm_fp16_alternative_ok } */
+/* { dg-require-effective-target arm_fp16_alternative_hw } */
 /* { dg-options "-ffast-math" } */
 /* { dg-add-options arm_fp16_alternative } */
 
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
index 42171d4e83e2..08eba10a3b62 100644
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
@@ -1,6 +1,6 @@
 /* Test floating-point conversions.  Standard types and __fp16.  */
 /* { dg-do run { target arm*-*-* } } */
-/* { dg-require-effective-target arm_fp16_alternative_ok }
+/* { dg-require-effective-target arm_fp16_alternative_hw } */
 /* { dg-add-options arm_fp16_alternative } */
 
 #include "fp-int-convert.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
index 3f0aecf357b4..839da720ad54 100644
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
@@ -1,6 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
-/* { dg-require-effective-target arm_fp16_alternative_ok }
+/* { dg-require-effective-target arm_fp16_alternative_hw } */
 /* { dg-add-options arm_fp16_alternative } */
 
 #include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
index 846515b5eabc..ec22e2534108 100644
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
@@ -1,6 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
-/* { dg-require-effective-target arm_fp16_alternative_ok }
+/* { dg-require-effective-target arm_fp16_alternative_hw } */
 /* { dg-options "-ffast-math" } */
 /* { dg-add-options arm_fp16_alternative } */
 
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index fe03beb273a7..13f2ba92cfdb 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -6005,6 +6005,29 @@ proc check_effective_target_arm_fp16_alternative_ok { } {
 		check_effective_target_arm_fp16_alternative_ok_nocache]
 }
 
+# Return 1 if the target supports executing FP16 alternative format
+# instructions selected by arm_fp16_alternative_ok.
+
+proc check_effective_target_arm_fp16_alternative_hw { } {
+    if { ! [check_effective_target_arm_fp16_alternative_ok] } {
+	return 0
+    }
+
+    global et_arm_fp16_alternative_flags
+    check_runtime arm_fp16_alternative_hw {
+	int
+	main (int argc, char **argv)
+	{
+	  __fp16 a = 1.0;
+	  float r;
+	  asm ("vcvtb.f32.f16 %0, %1"
+	       : "=w" (r) : "w" (a)
+	       : /* No clobbers.  */);
+	  return (r == 1.0) ? 0 : 1;
+	}
+    } "$et_arm_fp16_alternative_flags"
+}
+
 # Return 1 if this is an ARM target supports specifying the FP16 none
 # format.  Some multilibs may be incompatible with the options needed.