[gcc r17-2740] i386: Avoid XCHGB %rH, %rL in bswaphi2 on non-pentium4 targets [PR126433]

https://gcc.gnu.org/g:baf658d80576de061320f136945fff90359ff7fd

commit r17-2740-gbaf658d80576de061320f136945fff90359ff7fd
Author: Uros Bizjak <[email protected]>
Date:   Tue Jul 28 08:41:57 2026 +0200

    i386: Avoid XCHGB %rH, %rL in bswaphi2 on non-pentium4 targets [PR126433]
    
    XCHGB has higher latency than ROLW for non-pentium4 targets, so it
    should be avoided. Switch from the preferred_for_size/preferred_for_speed
    attributes to the "enabled" attribute to hard-disable unwanted alternatives.
    
            PR target/126433
    
    gcc/ChangeLog:
    
            * config/i386/i386.md (*bswaphi2_movbe) Use enabled attribute.
            Remove preferred_for_speed and preferred_for_size attributes.
            (*bswaphi2): Ditto.
            (*bswaphisi2_lowpart): Ditto.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/i386/xchg-1.c: Scan for ROL instead of XCHG.
            * gcc.target/i386/xchg-2.c: Use -O2 -march=pentium4 to emit XCHG.

Diff:
---
 gcc/config/i386/i386.md                | 45 ++++++++++++++--------------------
 gcc/testsuite/gcc.target/i386/xchg-1.c |  2 +-
 gcc/testsuite/gcc.target/i386/xchg-2.c |  6 ++---
 3 files changed, 22 insertions(+), 31 deletions(-)

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f762b2ccea2d..230fcb576d02 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -23693,16 +23693,13 @@
    (set_attr "c86_decode" "vector,*,*,*")
    (set_attr "bdver1_decode" "double,*,*,*")
    (set_attr "mode" "QI,HI,HI,HI")
-   (set (attr "preferred_for_size")
-     (cond [(eq_attr "alternative" "1")
-	      (symbol_ref "false")
-	   ]
-	   (symbol_ref "true")))
-   (set (attr "preferred_for_speed")
-     (cond [(eq_attr "alternative" "1")
-	      (symbol_ref "!TARGET_USE_XCHGB")
+   (set (attr "enabled")
+     (cond [(eq_attr "alternative" "0")
+              (symbol_ref "TARGET_USE_XCHGB")
+	    (eq_attr "alternative" "1")
+              (symbol_ref "!TARGET_USE_XCHGB")
 	   ]
-	   (symbol_ref "true")))])
+	   (const_string "*")))])
 
 (define_insn "*bswaphi2"
   [(set (match_operand:HI 0 "register_operand" "=Q,r")
@@ -23719,16 +23716,13 @@
    (set_attr "c86_decode" "vector,*")
    (set_attr "bdver1_decode" "double,*")
    (set_attr "mode" "QI,HI")
-   (set (attr "preferred_for_size")
-     (cond [(eq_attr "alternative" "1")
-	      (symbol_ref "false")
-	   ]
-	   (symbol_ref "true")))
-   (set (attr "preferred_for_speed")
-     (cond [(eq_attr "alternative" "1")
-	      (symbol_ref "!TARGET_USE_XCHGB")
+   (set (attr "enabled")
+     (cond [(eq_attr "alternative" "0")
+              (symbol_ref "TARGET_USE_XCHGB")
+	    (eq_attr "alternative" "1")
+              (symbol_ref "!TARGET_USE_XCHGB")
 	   ]
-	   (symbol_ref "true")))])
+	   (const_string "*")))])
 
 (define_insn "bswaphisi2_lowpart"
   [(set (match_operand:SI 0 "register_operand" "=Q,r")
@@ -23748,16 +23742,13 @@
    (set_attr "c86_decode" "vector,*")
    (set_attr "bdver1_decode" "double,*")
    (set_attr "mode" "QI,HI")
-   (set (attr "preferred_for_size")
-     (cond [(eq_attr "alternative" "1")
-	      (symbol_ref "false")
-	   ]
-	   (symbol_ref "true")))
-   (set (attr "preferred_for_speed")
-     (cond [(eq_attr "alternative" "1")
-	      (symbol_ref "!TARGET_USE_XCHGB")
+   (set (attr "enabled")
+     (cond [(eq_attr "alternative" "0")
+              (symbol_ref "TARGET_USE_XCHGB")
+	    (eq_attr "alternative" "1")
+              (symbol_ref "!TARGET_USE_XCHGB")
 	   ]
-	   (symbol_ref "true")))])
+	   (const_string "*")))])
 
 (define_expand "bitreverse<mode>2"
   [(set (match_operand:SWIDWI 0 "register_operand")
diff --git a/gcc/testsuite/gcc.target/i386/xchg-1.c b/gcc/testsuite/gcc.target/i386/xchg-1.c
index ea9fc7a8b14e..f3e8f84ddf46 100644
--- a/gcc/testsuite/gcc.target/i386/xchg-1.c
+++ b/gcc/testsuite/gcc.target/i386/xchg-1.c
@@ -6,4 +6,4 @@ unsigned short good(unsigned short a)
        return (a >> 8 | a << 8);
 }
 
-/* { dg-final { scan-assembler "\[ \t\]xchg" } } */
+/* { dg-final { scan-assembler "\[ \t\]rol" } } */
diff --git a/gcc/testsuite/gcc.target/i386/xchg-2.c b/gcc/testsuite/gcc.target/i386/xchg-2.c
index f00fb0f21156..9cd02eb310b4 100644
--- a/gcc/testsuite/gcc.target/i386/xchg-2.c
+++ b/gcc/testsuite/gcc.target/i386/xchg-2.c
@@ -1,9 +1,9 @@
-/* { dg-do compile } */
-/* { dg-options "-Os" } */
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -march=pentium4" } */
 
 unsigned short good(unsigned short a)
 {
        return (a >> 8 | a << 8);
 }
 
-/* { dg-final { scan-assembler "xchgb" } } */
+/* { dg-final { scan-assembler "\[ \t\]xchg" } } */