[gcc r17-2775] testsuite/aarch64: update the fcmla counts in pr122408_1.f90

Kyrylo Tkachov via Gcc-cvs <[email protected]> Wed, 29 Jul 2026 07:16:01 +0000 (GMT)
Newsgroups gmane.comp.gcc.cvs
Message-ID <[email protected]>
https://gcc.gnu.org/g:e584ae9446b47bf3a06183ebedc4f2ffc53fa02c

commit r17-2775-ge584ae9446b47bf3a06183ebedc4f2ffc53fa02c
Author: Kyrylo Tkachov <[email protected]>
Date:   Sun Jul 26 10:09:19 2026 -0700

    testsuite/aarch64: update the fcmla counts in pr122408_1.f90
    
    The test hard-codes two "fcmla ..., #0", which was the number trunk
    happened to emit when it was added.  BB SLP now also vectorises the two
    plain-multiply subroutines: r17-141-g76b8869f08a6 ("tree-optimization/
    124222 - rewrite BB SLP costing scalar coverage") taught
    vect_bb_slp_scalar_cost to attribute the statements an SLP pattern node
    covers, so the subgraph for c_add_ab and c_sub_ab is no longer costed as
    unprofitable.  They form .COMPLEX_MUL, and cmul<mode>3 expands each to
    "fcmla #0" plus "fcmla #90", taking the #0 total from two to four.
    
    For c_add_ab the loop body goes from a scalar pair of complex multiplies
    
            ldr     d26, [x5, x0]
            ldr     d27, [x3, x0]
            ldr     d29, [x2, x0]
            fmul    d24, d30, d26
            ldr     d28, [x1, x0]
            fnmsub  d24, d31, d27, d24
            fmul    d25, d30, d27
            fmadd   d25, d31, d26, d25
            fadd    d24, d29, d24
            fadd    d25, d25, d28
            str     d24, [x2, x0]
            str     d25, [x1, x0]
            add     x0, x0, 16
            cmp     x4, x0
            bne     .L3
    
    to the vectorised form
    
            ldr     q29, [x2, x0]
            movi    v27.4s, 0
            ldr     q28, [x3, x0]
            fcmla   v27.2d, v28.2d, v31.2d, #0
            fcmla   v27.2d, v28.2d, v31.2d, #90
            fadd    v27.2d, v27.2d, v29.2d
            str     q27, [x2, x0]
            add     x0, x0, 16
            cmp     x0, x1
            bne     .L3
    
    i.e. ten instructions instead of fifteen, and the whole rotation mix
    across the file changes from
    
            #0=2  #90=0  #180=0  #270=2
    
    to
    
            #0=4  #90=2  #180=0  #270=2
    
    The loop vectoriser is unchanged: its dumps are identical before and
    after, the two conjugate subroutines still form .COMPLEX_MUL_CONJ, and
    the #270 directive that actually tests PR122408 still passes.  The
    runtime companion pr122408_2.f90 also still runs clean.
    
    Update the counts, and add a #90 count and a #180 scan-assembler-not.
    PR122408 was about picking the wrong rotation pair after operand
    swapping, so pinning the full rotation mix guards the regression more
    directly than the #0 count did.
    
    gcc/testsuite/ChangeLog:
    
            * gfortran.target/aarch64/pr122408_1.f90: Update the fcmla
            rotation counts.
    
    Signed-off-by: Kyrylo Tkachov <[email protected]>

Diff:
---
 gcc/testsuite/gfortran.target/aarch64/pr122408_1.f90 | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gfortran.target/aarch64/pr122408_1.f90 b/gcc/testsuite/gfortran.target/aarch64/pr122408_1.f90
index 8a3416231ff1..c1996b748699 100644
--- a/gcc/testsuite/gfortran.target/aarch64/pr122408_1.f90
+++ b/gcc/testsuite/gfortran.target/aarch64/pr122408_1.f90
@@ -57,5 +57,10 @@ subroutine c_sub_a_conjb(n, a, c, b)    ! C -= A * conj(B)
   end do
 end subroutine c_sub_a_conjb
 
-! { dg-final { scan-assembler-times {fcmla\s+v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, #0} 2 } }
+! The two plain multiplies form .COMPLEX_MUL (#0 + #90) and the two conjugate
+! multiplies form .COMPLEX_MUL_CONJ (#0 + #270).  PR122408 is about detecting
+! the conjugate form, so the #270 and #180 counts are the ones that guard it.
+! { dg-final { scan-assembler-times {fcmla\s+v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, #0} 4 } }
+! { dg-final { scan-assembler-times {fcmla\s+v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, #90} 2 } }
 ! { dg-final { scan-assembler-times {fcmla\s+v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, #270} 2 } }
+! { dg-final { scan-assembler-not {fcmla\s+v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, #180} } }